static void spi_transfer_irq(void)
{
QM_PUTS("Reading CHIPID in IRQ mode.");
tx_buffer[0] = 0x80; /* Read chip ID. */
/* Set up transfer values. */
qm_ss_spi_async_transfer_t irq_trans;
irq_trans.rx = rx_buffer;
irq_trans.tx = tx_buffer;
irq_trans.rx_len = BUFFER_SIZE;
irq_trans.tx_len = BUFFER_SIZE;
irq_trans.callback_data = NULL;
irq_trans.callback = spi_cb;
/* Register interrupts. */
qm_ss_irq_request(QM_SS_IRQ_SPI_0_ERROR_INT, qm_ss_spi_0_error_isr);
qm_ss_irq_request(QM_SS_IRQ_SPI_0_RX_AVAIL_INT,
qm_ss_spi_0_rx_avail_isr);
qm_ss_irq_request(QM_SS_IRQ_SPI_0_TX_REQ_INT, qm_ss_spi_0_tx_req_isr);
tx_buffer[0] = 0x80; /* Read chip ID. */
err_code = 0;
xfer_active = true;
/* Set SPI configuration. */
qm_ss_spi_set_config(spi, &conf);
/* Enable clock for SPI 0. */
ss_clk_spi_enable(QM_SS_SPI_0);
/* Select slave and do the actual SPI transfer. */
qm_ss_spi_slave_select(spi, select);
qm_ss_spi_irq_transfer(spi, &irq_trans);
while (xfer_active)
;
/* Disable clock for SPI 0. */
ss_clk_spi_disable(QM_SS_SPI_0);
if (err_code != 0) {
QM_PRINTF(
"Error: SPI transfer failed. (%d frames transmitted)\n",
transfer_len);
} else if (rx_buffer[1] == 0xd1) {
QM_PUTS("CHIPID = 0x1d");
} else {
QM_PRINTF("Error: CHIPID doesn't match 0x%x != 0xd1.\n",
rx_buffer[1]);
}
}
static void ss_gpio_interrupt_example(void)
{
uint32_t i;
QM_PUTS("Starting: SS GPIO interrupt");
/* Enable clock to interrupt controller. */
__builtin_arc_sr(BIT(31) + BIT(0),
QM_SS_GPIO_0_BASE + QM_SS_GPIO_LS_SYNC);
/* Set SS GPIO pin 2 as OUTPUT. */
__builtin_arc_sr(BIT(2), QM_SS_GPIO_0_BASE + QM_SS_GPIO_SWPORTA_DDR);
/* Register the SS GPIO interrupt. */
QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->ss_gpio_0_int_mask);
qm_ss_irq_request(QM_SS_IRQ_GPIO_0_INT, ss_gpio_interrupt_isr);
/* Set the bit 3 to rising edge-sensitive. */
__builtin_arc_sr(BIT(3), QM_SS_GPIO_0_BASE + QM_SS_GPIO_INTTYPE_LEVEL);
/* Unmask SS GPIO pin 3 interrupt only. */
__builtin_arc_sr(~BIT(3), QM_SS_GPIO_0_BASE + QM_SS_GPIO_INTMASK);
/* Clear SS GPIO interrupt requests. */
__builtin_arc_sr(BIT(3), QM_SS_GPIO_0_BASE + QM_SS_GPIO_PORTA_EOI);
/* Enable SS GPIO interrupt. */
__builtin_arc_sr(BIT(3), QM_SS_GPIO_0_BASE + QM_SS_GPIO_INTEN);
for (i = 0; i < NUM_LOOPS; i++) {
/*
* Toggle the SS GPIO 2, will trigger the interrupt on SS
* GPIO 3.
*/
clk_sys_udelay(DELAY);
__builtin_arc_sr(BIT(2),
QM_SS_GPIO_0_BASE + QM_SS_GPIO_SWPORTA_DR);
QM_GPIO[0]->gpio_swporta_dr |= BIT(LED_BIT);
clk_sys_udelay(DELAY);
__builtin_arc_sr(0, QM_SS_GPIO_0_BASE + QM_SS_GPIO_SWPORTA_DR);
QM_GPIO[0]->gpio_swporta_dr &= ~BIT(LED_BIT);
}
/* Unmask all SS GPIO interrupts. */
__builtin_arc_sr(0xff, QM_SS_GPIO_0_BASE + QM_SS_GPIO_INTMASK);
if (counter == NUM_LOOPS) {
QM_PUTS("Success");
} else {
QM_PUTS("Error: Check are pins 14 and 16 on J14 connector "
"short connected?");
}
QM_PUTS("Finished: SS GPIO interrupt");
}
int main(void)
{
qm_ss_gpio_state_t state;
qm_ss_gpio_port_config_t conf;
QM_PUTS("Starting: SS GPIO");
pin_mux_setup();
/* Request IRQ and write SS GPIO port config. */
conf.direction = BIT(PIN_OUT); /* Set PIN_OUT to output. */
conf.int_en = BIT(PIN_INTR); /* Interrupt enabled. */
conf.int_type = BIT(PIN_INTR); /* Edge sensitive interrupt. */
conf.int_polarity = ~BIT(PIN_INTR); /* Falling edge. */
conf.int_debounce = BIT(PIN_INTR); /* Debounce enabled. */
conf.callback = gpio_example_callback;
conf.callback_data = NULL;
/* Enable clock. */
ss_clk_gpio_enable(QM_SS_GPIO_0);
QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->ss_gpio_0_int_mask);
qm_ss_irq_request(QM_SS_IRQ_GPIO_0_INT, qm_ss_gpio_0_isr);
qm_ss_gpio_set_config(QM_SS_GPIO_0, &conf);
/* Clear PIN_OUT to trigger PIN_INTR interrupt. */
qm_ss_gpio_set_pin(QM_SS_GPIO_0, PIN_OUT);
qm_ss_gpio_clear_pin(QM_SS_GPIO_0, PIN_OUT);
/* Wait for callback to be invoked */
while (!callback_invoked)
;
QM_PRINTF("Callback fired, status: 0x%x\n", callback_status);
if (qm_ss_gpio_read_pin(QM_SS_GPIO_0, PIN_OUT, &state)) {
QM_PUTS("Error: read pin failed");
return 1;
}
if (state != QM_SS_GPIO_LOW) {
QM_PUTS("Error: SS GPIO pin out comparison failed");
return 1;
}
QM_PUTS("Finished: SS GPIO");
return 0;
}
int main(void)
{
int i;
qm_ss_adc_config_t cfg;
qm_ss_adc_xfer_t xfer;
qm_ss_adc_channel_t channels[] = {QM_SS_ADC_CH_10, QM_SS_ADC_CH_11};
uint16_t samples_polled[NUM_SAMPLES_POLLED] = {0};
uint16_t samples_interrupt[NUM_SAMPLES_INTERRUPT] = {0};
QM_PUTS("Starting: SS ADC");
/* Enable the ADC and set the clock divisor. */
ss_clk_adc_enable();
ss_clk_adc_set_div(100);
/* Set up pinmux. */
qm_pmux_select(QM_PIN_ID_10, QM_PMUX_FN_1);
qm_pmux_select(QM_PIN_ID_11, QM_PMUX_FN_1);
qm_pmux_input_en(QM_PIN_ID_10, true);
qm_pmux_input_en(QM_PIN_ID_11, true);
/* Set the mode and calibrate. */
qm_ss_adc_set_mode(QM_SS_ADC_0, QM_SS_ADC_MODE_NORM_CAL);
qm_ss_adc_calibrate(QM_SS_ADC_0);
/* Set up config. */
cfg.window = 50; /* Clock cycles between the start of each sample. */
cfg.resolution = QM_SS_ADC_RES_12_BITS;
qm_ss_adc_set_config(QM_SS_ADC_0, &cfg);
/* ADC polled mode example. */
QM_PUTS("ADC polled mode");
/* Set up xfer. */
xfer.ch = channels;
xfer.ch_len = NUM_CHANNELS;
xfer.samples = samples_polled;
xfer.samples_len = NUM_SAMPLES_POLLED;
xfer.callback = NULL;
xfer.callback_data = NULL;
/* Run the conversion. */
if (qm_ss_adc_convert(QM_SS_ADC_0, &xfer, NULL)) {
QM_PUTS("Error: qm_ss_adc_convert failed");
return 1;
}
/* Print the values of the samples. */
for (i = 0; i < NUM_SAMPLES_POLLED; i++) {
QM_PRINTF("%d:%x ", i, (unsigned int)samples_polled[i]);
}
/* ADC interrupt mode example. */
QM_PUTS("\nADC interrupt mode");
/* Request the necessary IRQs. */
qm_ss_irq_request(QM_SS_IRQ_ADC_0_INT, qm_ss_adc_0_isr);
qm_ss_irq_request(QM_SS_IRQ_ADC_0_ERROR_INT, qm_ss_adc_0_error_isr);
/* Set up xfer. */
xfer.ch = channels;
xfer.ch_len = NUM_CHANNELS;
xfer.samples = samples_interrupt;
xfer.samples_len = NUM_SAMPLES_INTERRUPT;
xfer.callback = callback;
xfer.callback_data = NULL;
if (qm_ss_adc_irq_convert(QM_SS_ADC_0, &xfer)) {
QM_PUTS("Error: qm_adc_irq_convert failed");
return 1;
}
/* Wait for the callback. */
while (false == complete)
;
if (!callback_error) {
QM_PUTS("---COMPLETE CALLBACK---");
} else if (overflow_error) {
QM_PUTS("Error: ADC FIFO overflow");
return 1;
} else if (underflow_error) {
QM_PUTS("Error: ADC FIFO underflow");
return 1;
} else if (seq_error) {
QM_PUTS("Error: ADC sequencer error");
return 1;
}
/* Print the values of the samples. */
for (i = 0; i < NUM_SAMPLES_INTERRUPT; i++) {
QM_PRINTF("%d:%x ", i, (unsigned int)samples_interrupt[i]);
}
QM_PUTS("\nFinished: SS ADC");
return 0;
}
