void __init r8a7779_add_standard_devices(void) { #ifdef CONFIG_CACHE_L2X0 /* Early BRESP enable, Shared attribute override enable, 64K*16way */ l2x0_init((void __iomem __force *)(0xf0100000), 0x40470000, 0x82000fff); #endif r8a7779_pm_init(); r8a7779_init_pm_domain(&r8a7779_sh4a); r8a7779_init_pm_domain(&r8a7779_sgx); r8a7779_init_pm_domain(&r8a7779_vdp1); r8a7779_init_pm_domain(&r8a7779_impx3); platform_add_devices(r8a7779_early_devices, ARRAY_SIZE(r8a7779_early_devices)); platform_add_devices(r8a7779_late_devices, ARRAY_SIZE(r8a7779_late_devices)); r8a7779_add_device_to_domain(&r8a7779_sgx, &sgx_device); pm_clk_add(&sgx_device.dev, "sgx"); #ifdef CONFIG_RENESAS_RCAR_PCI rcar_pcie_init(&pcie_device); #endif }
void __init r8a7779_add_standard_devices(void) { #ifdef CONFIG_CACHE_L2X0 /* Early BRESP enable, Shared attribute override enable, 64K*16way */ l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff); #endif r8a7779_pm_init(); r8a7779_init_pm_domains(); platform_add_devices(r8a7779_early_devices, ARRAY_SIZE(r8a7779_early_devices)); platform_add_devices(r8a7779_late_devices, ARRAY_SIZE(r8a7779_late_devices)); }
void __init r8a7779_add_standard_devices(void) { #ifdef CONFIG_CACHE_L2X0 /* Shared attribute override enable, 64K*16way */ l2x0_init(IOMEM(0xf0100000), 0x00400000, 0xc20f0fff); #endif r8a7779_pm_init(); r8a7779_init_pm_domains(); platform_add_devices(r8a7779_early_devices, ARRAY_SIZE(r8a7779_early_devices)); platform_add_devices(r8a7779_standard_devices, ARRAY_SIZE(r8a7779_standard_devices)); r8a7779_register_hpb_dmae(); }
void __init r8a7779_add_standard_devices(void) { #ifdef CONFIG_CACHE_L2X0 /* */ l2x0_init((void __iomem __force *)(0xf0100000), 0x40470000, 0x82000fff); #endif r8a7779_pm_init(); r8a7779_init_pm_domain(&r8a7779_sh4a); r8a7779_init_pm_domain(&r8a7779_sgx); r8a7779_init_pm_domain(&r8a7779_vdp1); r8a7779_init_pm_domain(&r8a7779_impx3); platform_add_devices(r8a7779_early_devices, ARRAY_SIZE(r8a7779_early_devices)); platform_add_devices(r8a7779_late_devices, ARRAY_SIZE(r8a7779_late_devices)); }
static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus) { /* Map the reset vector (in headsmp-scu.S, headsmp.S) */ __raw_writel(__pa(shmobile_boot_vector), AVECR); shmobile_boot_fn = virt_to_phys(shmobile_boot_scu); shmobile_boot_arg = (unsigned long)shmobile_scu_base; /* setup r8a7779 specific SCU bits */ shmobile_scu_base = IOMEM(R8A7779_SCU_BASE); shmobile_smp_scu_prepare_cpus(max_cpus); r8a7779_pm_init(); /* power off secondary CPUs */ r8a7779_platform_cpu_kill(1); r8a7779_platform_cpu_kill(2); r8a7779_platform_cpu_kill(3); }
void __init r8a7779_smp_prepare_cpus(void) { int cpu = cpu_logical_map(0); scu_enable(scu_base_addr()); /* Map the reset vector (in headsmp.S) */ __raw_writel(__pa(shmobile_secondary_vector), AVECR); /* enable cache coherency on CPU0 */ modify_scu_cpu_psr(0, 3 << (cpu * 8)); r8a7779_pm_init(); /* power off secondary CPUs */ r8a7779_platform_cpu_kill(1); r8a7779_platform_cpu_kill(2); r8a7779_platform_cpu_kill(3); }