/** * Add coreboot tables, CBMEM information and optional board specific strapping * IDs to the device tree loaded via FIT. */ static void add_cb_fdt_data(struct device_tree *tree) { u32 addr_cells = 1, size_cells = 1; u64 reg_addrs[2], reg_sizes[2]; void *baseptr = NULL; size_t size = 0; static const char *firmware_path[] = {"firmware", NULL}; struct device_tree_node *firmware_node = dt_find_node(tree->root, firmware_path, &addr_cells, &size_cells, 1); /* Need to add 'ranges' to the intermediate node to make 'reg' work. */ dt_add_bin_prop(firmware_node, "ranges", NULL, 0); static const char *coreboot_path[] = {"coreboot", NULL}; struct device_tree_node *coreboot_node = dt_find_node(firmware_node, coreboot_path, &addr_cells, &size_cells, 1); dt_add_string_prop(coreboot_node, "compatible", "coreboot"); /* Fetch CB tables from cbmem */ void *cbtable = cbmem_find(CBMEM_ID_CBTABLE); if (!cbtable) { printk(BIOS_WARNING, "FIT: No coreboot table found!\n"); return; } /* First 'reg' address range is the coreboot table. */ const struct lb_header *header = cbtable; reg_addrs[0] = (uintptr_t)header; reg_sizes[0] = header->header_bytes + header->table_bytes; /* Second is the CBMEM area (which usually includes the coreboot table). */ cbmem_get_region(&baseptr, &size); if (!baseptr || size == 0) { printk(BIOS_WARNING, "FIT: CBMEM pointer/size not found!\n"); return; } reg_addrs[1] = (uintptr_t)baseptr; reg_sizes[1] = size; dt_add_reg_prop(coreboot_node, reg_addrs, reg_sizes, 2, addr_cells, size_cells); /* Expose board ID, SKU ID, and RAM code to payload.*/ if (board_id() != UNDEFINED_STRAPPING_ID) dt_add_u32_prop(coreboot_node, "board-id", board_id()); if (sku_id() != UNDEFINED_STRAPPING_ID) dt_add_u32_prop(coreboot_node, "sku-id", sku_id()); if (ram_code() != UNDEFINED_STRAPPING_ID) dt_add_u32_prop(coreboot_node, "ram-code", ram_code()); }
const struct rk3288_sdram_params *get_sdram_config() { u32 ramcode = ram_code(); if (ramcode >= ARRAY_SIZE(sdram_configs) || sdram_configs[ramcode].dramtype == UNUSED) die("Invalid RAMCODE."); return &sdram_configs[ramcode]; }
const struct rk3399_sdram_params *get_sdram_config() { uint32_t ramcode; ramcode = ram_code(); if (ramcode >= ARRAY_SIZE(sdram_configs) || !sdram_configs[ramcode] || (cbfs_boot_load_struct(sdram_configs[ramcode], ¶ms, sizeof(params)) != sizeof(params))) die("Cannot load SDRAM parameter file!"); return ¶ms; }
static void lb_ram_code(struct lb_header *header) { #if IS_ENABLED(CONFIG_RAM_CODE_SUPPORT) struct lb_ram_code *code; code = (struct lb_ram_code *)lb_new_record(header); code->tag = LB_TAG_RAM_CODE; code->size = sizeof(*code); code->ram_code = ram_code(); #endif }
const struct rk3288_sdram_params *get_sdram_config() { u32 ramcode; /* early boards had incorrect config */ if (board_id() == 0) return &sdram_configs[0]; ramcode = ram_code(); if (ramcode >= ARRAY_SIZE(sdram_configs) || sdram_configs[ramcode].dramtype == UNUSED) die("Invalid RAMCODE."); return &sdram_configs[ramcode]; }
static void lb_ram_code(struct lb_header *header) { struct lb_strapping_id *rec; uint32_t code = ram_code(); if (code == UNDEFINED_STRAPPING_ID) return; rec = (struct lb_strapping_id *)lb_new_record(header); rec->tag = LB_TAG_RAM_CODE; rec->size = sizeof(*rec); rec->id_code = code; printk(BIOS_INFO, "RAM code: %d\n", code); }