int get_node_id( struct usb_device *dev, __u8 *id )
{
int i;
for ( i=0; i<3; i++ ) {
if ( read_srom_word(dev, i, (__u16 *)&id[i*2] ) )
return 1;
}
return 0;
}
/*
Search DM910X board ,allocate space and register it
*/
int dmfe_probe(struct device *dev)
{
unsigned long pci_iobase;
u16 dm9102_count = 0;
u8 pci_irqline;
static int index = 0; /* For multiple call */
struct dmfe_board_info *db; /* Point a board information structure */
int i;
struct pci_dev *net_dev = NULL;
DMFE_DBUG(0, "dmfe_probe()", 0);
if (!pci_present())
return -ENODEV;
index = 0;
while ((net_dev = pci_find_class(PCI_CLASS_NETWORK_ETHERNET << 8, net_dev)))
{
u32 pci_id;
u32 dev_rev;
u8 pci_cmd;
index++;
if (pci_read_config_dword(net_dev, PCI_VENDOR_ID, &pci_id) != DMFE_SUCC)
continue;
if ((pci_id != PCI_DM9102_ID) && (pci_id != PCI_DM9132_ID))
continue;
/* read PCI IO base address and IRQ to check */
pci_iobase = net_dev->base_address[0];
pci_irqline = net_dev->irq;
pci_iobase &= ~0x7f; /* mask off bit0~6 */
/* Enable Master/IO access, Disable memory access */
pci_read_config_byte(net_dev, PCI_COMMAND, &pci_cmd);
pci_cmd |= PCI_COMMAND_IO + PCI_COMMAND_MASTER;
pci_cmd &= ~PCI_COMMAND_MEMORY;
pci_write_config_byte(net_dev, PCI_COMMAND, pci_cmd);
/* Set Latency Timer 80h */
pci_write_config_byte(net_dev, PCI_LATENCY_TIMER, 0x80);
/* Read Chip revesion */
pci_read_config_dword(net_dev, PCI_REVISION_ID, &dev_rev);
/* IO range check */
if (check_region(pci_iobase, CHK_IO_SIZE(pci_id, dev_rev)))
continue;
/* Interrupt check */
if (pci_irqline == 0) {
printk(KERN_ERR "dmfe: Interrupt wrong : IRQ=%d\n", pci_irqline);
continue;
}
/* Found DM9102 card and PCI resource allocated OK */
dm9102_count++; /* Found a DM9102 card */
/* Init network device */
dev = init_etherdev(dev, 0);
/* Allocated board information structure */
db = (void *) (kmalloc(sizeof(*db), GFP_KERNEL | GFP_DMA));
memset(db, 0, sizeof(*db));
dev->priv = db; /* link device and board info */
db->next_dev = dmfe_root_dev;
dmfe_root_dev = dev;
db->chip_id = pci_id; /* keep Chip vandor/Device ID */
db->ioaddr = pci_iobase;
db->chip_revesion = dev_rev;
db->net_dev = net_dev;
dev->base_addr = pci_iobase;
dev->irq = pci_irqline;
dev->open = &dmfe_open;
dev->hard_start_xmit = &dmfe_start_xmit;
dev->stop = &dmfe_stop;
dev->get_stats = &dmfe_get_stats;
dev->set_multicast_list = &dmfe_set_filter_mode;
dev->do_ioctl = &dmfe_do_ioctl;
request_region(pci_iobase, CHK_IO_SIZE(pci_id, dev_rev), dev->name);
/* read 64 word srom data */
for (i = 0; i < 64; i++)
((u16 *) db->srom)[i] = read_srom_word(pci_iobase, i);
/* Set Node address */
for (i = 0; i < 6; i++)
dev->dev_addr[i] = db->srom[20 + i];
dev = 0; /* NULL device */
}
return dm9102_count ? 0 : -ENODEV;
}
int __init dmfe_probe1(struct net_device *dev)
{
struct board_info *db; /* Point a board information structure */
u32 id_val;
u16 i, dm9000_found = FALSE;
u8 MAC_addr[6]={0x00,0x60,0x6E,0x33,0x44,0x55};
u8 HasEEPROM=0,chip_info;
DMFE_DBUG(0, "dmfe_probe1()",0);
/* Search All DM9000 serial NIC */
do {
outb(DM9KS_VID_L, iobase);
id_val = inb(iobase + 4);
outb(DM9KS_VID_H, iobase);
id_val |= inb(iobase + 4) << 8;
outb(DM9KS_PID_L, iobase);
id_val |= inb(iobase + 4) << 16;
outb(DM9KS_PID_H, iobase);
id_val |= inb(iobase + 4) << 24;
if (id_val == DM9KS_ID || id_val == DM9010_ID) {
/* Request IO from system */
if(!request_region(iobase, 2, dev->name))
return -ENODEV;
printk(KERN_ERR"<DM9KS> I/O: %x, VID: %x \n",iobase, id_val);
dm9000_found = TRUE;
/* Allocated board information structure */
memset(dev->priv, 0, sizeof(struct board_info));
db = (board_info_t *)dev->priv;
dmfe_dev = dev;
db->io_addr = iobase;
db->io_data = iobase + 4;
db->chip_revision = ior(db, DM9KS_CHIPR);
chip_info = ior(db,0x43);
if((db->chip_revision!=0x1A) || ((chip_info&(1<<5))!=0) || ((chip_info&(1<<2))!=1)) return -ENODEV;
/* driver system function */
dev->base_addr = iobase;
dev->irq = irq;
dev->open = &dmfe_open;
dev->hard_start_xmit = &dmfe_start_xmit;
dev->watchdog_timeo = 5*HZ;
dev->tx_timeout = dmfe_timeout;
dev->stop = &dmfe_stop;
dev->get_stats = &dmfe_get_stats;
dev->set_multicast_list = &dm9000_hash_table;
dev->do_ioctl = &dmfe_do_ioctl;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,28)
dev->ethtool_ops = &dmfe_ethtool_ops;
#endif
#ifdef CHECKSUM
//dev->features |= NETIF_F_IP_CSUM;
dev->features |= NETIF_F_IP_CSUM|NETIF_F_SG;
#endif
db->mii.dev = dev;
db->mii.mdio_read = mdio_read;
db->mii.mdio_write = mdio_write;
db->mii.phy_id = 1;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20)
db->mii.phy_id_mask = 0x1F;
db->mii.reg_num_mask = 0x1F;
#endif
//db->msg_enable =(debug == 0 ? DMFE_DEF_MSG_ENABLE : ((1 << debug) - 1));
/* Read SROM content */
for (i=0; i<64; i++)
((u16 *)db->srom)[i] = read_srom_word(db, i);
/* Get the PID and VID from EEPROM to check */
id_val = (((u16 *)db->srom)[4])|(((u16 *)db->srom)[5]<<16);
printk("id_val=%x\n", id_val);
if (id_val == DM9KS_ID || id_val == DM9010_ID)
HasEEPROM =1;
/* Set Node Address */
for (i=0; i<6; i++)
{
if (HasEEPROM) /* use EEPROM */
dev->dev_addr[i] = db->srom[i];
else /* No EEPROM */
dev->dev_addr[i] = MAC_addr[i];
}
}//end of if()
iobase += 0x10;
}while(!dm9000_found && iobase <= DM9KS_MAX_IO);
return dm9000_found ? 0:-ENODEV;
}
