static CORE_ADDR
m88k_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
struct value **args, CORE_ADDR sp, int struct_return,
CORE_ADDR struct_addr)
{
/* Set up the function arguments. */
sp = m88k_store_arguments (regcache, nargs, args, sp);
gdb_assert (sp % 16 == 0);
/* Store return value address. */
if (struct_return)
regcache_raw_write_unsigned (regcache, M88K_R12_REGNUM, struct_addr);
/* Store the stack pointer and return address in the appropriate
registers. */
regcache_raw_write_unsigned (regcache, M88K_R31_REGNUM, sp);
regcache_raw_write_unsigned (regcache, M88K_R1_REGNUM, bp_addr);
/* Return the stack pointer. */
return sp;
}
static void
msp430_pseudo_register_write (struct gdbarch *gdbarch,
struct regcache *regcache,
int regnum, const gdb_byte *buffer)
{
if (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS)
{
ULONGEST val;
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int regsize = register_size (gdbarch, regnum);
int raw_regnum = regnum - MSP430_NUM_REGS;
val = extract_unsigned_integer (buffer, regsize, byte_order);
regcache_raw_write_unsigned (regcache, raw_regnum, val);
}
else
gdb_assert_not_reached ("invalid pseudo register number");
}
static CORE_ADDR
rs6000_lynx178_push_dummy_call (struct gdbarch *gdbarch,
struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int ii;
int len = 0;
int argno; /* current argument number */
int argbytes; /* current argument byte */
gdb_byte tmp_buffer[50];
int f_argno = 0; /* current floating point argno */
int wordsize = gdbarch_tdep (gdbarch)->wordsize;
CORE_ADDR func_addr = find_function_addr (function, NULL);
struct value *arg = 0;
struct type *type;
ULONGEST saved_sp;
/* The calling convention this function implements assumes the
processor has floating-point registers. We shouldn't be using it
on PPC variants that lack them. */
gdb_assert (ppc_floating_point_unit_p (gdbarch));
/* The first eight words of ther arguments are passed in registers.
Copy them appropriately. */
ii = 0;
/* If the function is returning a `struct', then the first word
(which will be passed in r3) is used for struct return address.
In that case we should advance one word and start from r4
register to copy parameters. */
if (struct_return)
{
regcache_raw_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
struct_addr);
ii++;
}
/* Effectively indirect call... gcc does...
return_val example( float, int);
eabi:
float in fp0, int in r3
offset of stack on overflow 8/16
for varargs, must go by type.
power open:
float in r3&r4, int in r5
offset of stack on overflow different
both:
return in r3 or f0. If no float, must study how gcc emulates floats;
pay attention to arg promotion.
User may have to cast\args to handle promotion correctly
since gdb won't know if prototype supplied or not. */
for (argno = 0, argbytes = 0; argno < nargs && ii < 8; ++ii)
{
int reg_size = register_size (gdbarch, ii + 3);
arg = args[argno];
type = check_typedef (value_type (arg));
len = TYPE_LENGTH (type);
if (TYPE_CODE (type) == TYPE_CODE_FLT)
{
/* Floating point arguments are passed in fpr's, as well as gpr's.
There are 13 fpr's reserved for passing parameters. At this point
there is no way we would run out of them.
Always store the floating point value using the register's
floating-point format. */
const int fp_regnum = tdep->ppc_fp0_regnum + 1 + f_argno;
gdb_byte reg_val[MAX_REGISTER_SIZE];
struct type *reg_type = register_type (gdbarch, fp_regnum);
gdb_assert (len <= 8);
convert_typed_floating (value_contents (arg), type,
reg_val, reg_type);
regcache_cooked_write (regcache, fp_regnum, reg_val);
++f_argno;
}
if (len > reg_size)
{
/* Argument takes more than one register. */
while (argbytes < len)
{
gdb_byte word[MAX_REGISTER_SIZE];
memset (word, 0, reg_size);
memcpy (word,
((char *) value_contents (arg)) + argbytes,
(len - argbytes) > reg_size
? reg_size : len - argbytes);
regcache_cooked_write (regcache,
tdep->ppc_gp0_regnum + 3 + ii,
word);
++ii, argbytes += reg_size;
if (ii >= 8)
goto ran_out_of_registers_for_arguments;
}
argbytes = 0;
--ii;
}
else
{
/* Argument can fit in one register. No problem. */
int adj = gdbarch_byte_order (gdbarch)
== BFD_ENDIAN_BIG ? reg_size - len : 0;
gdb_byte word[MAX_REGISTER_SIZE];
memset (word, 0, reg_size);
memcpy (word, value_contents (arg), len);
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3 +ii, word);
}
++argno;
}
ran_out_of_registers_for_arguments:
regcache_cooked_read_unsigned (regcache,
gdbarch_sp_regnum (gdbarch),
&saved_sp);
/* Location for 8 parameters are always reserved. */
sp -= wordsize * 8;
/* Another six words for back chain, TOC register, link register, etc. */
sp -= wordsize * 6;
/* Stack pointer must be quadword aligned. */
sp = align_down (sp, 16);
/* If there are more arguments, allocate space for them in
the stack, then push them starting from the ninth one. */
if ((argno < nargs) || argbytes)
{
int space = 0, jj;
if (argbytes)
{
space += align_up (len - argbytes, 4);
jj = argno + 1;
}
else
jj = argno;
for (; jj < nargs; ++jj)
{
struct value *val = args[jj];
space += align_up (TYPE_LENGTH (value_type (val)), 4);
}
/* Add location required for the rest of the parameters. */
space = align_up (space, 16);
sp -= space;
/* This is another instance we need to be concerned about
securing our stack space. If we write anything underneath %sp
(r1), we might conflict with the kernel who thinks he is free
to use this area. So, update %sp first before doing anything
else. */
regcache_raw_write_signed (regcache,
gdbarch_sp_regnum (gdbarch), sp);
/* If the last argument copied into the registers didn't fit there
completely, push the rest of it into stack. */
if (argbytes)
{
write_memory (sp + 24 + (ii * 4),
value_contents (arg) + argbytes,
len - argbytes);
++argno;
ii += align_up (len - argbytes, 4) / 4;
}
/* Push the rest of the arguments into stack. */
for (; argno < nargs; ++argno)
{
arg = args[argno];
type = check_typedef (value_type (arg));
len = TYPE_LENGTH (type);
/* Float types should be passed in fpr's, as well as in the
stack. */
if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13)
{
gdb_assert (len <= 8);
regcache_cooked_write (regcache,
tdep->ppc_fp0_regnum + 1 + f_argno,
value_contents (arg));
++f_argno;
}
write_memory (sp + 24 + (ii * 4), value_contents (arg), len);
ii += align_up (len, 4) / 4;
}
}
/* Set the stack pointer. According to the ABI, the SP is meant to
be set _before_ the corresponding stack space is used. On AIX,
this even applies when the target has been completely stopped!
Not doing this can lead to conflicts with the kernel which thinks
that it still has control over this not-yet-allocated stack
region. */
regcache_raw_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
/* Set back chain properly. */
store_unsigned_integer (tmp_buffer, wordsize, byte_order, saved_sp);
write_memory (sp, tmp_buffer, wordsize);
/* Point the inferior function call's return address at the dummy's
breakpoint. */
regcache_raw_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
target_store_registers (regcache, -1);
return sp;
}
static CORE_ADDR
amd64_push_arguments(struct regcache *regcache, int nargs,
struct value **args, CORE_ADDR sp, int struct_return)
{
static int integer_regnum[] =
{
AMD64_RDI_REGNUM, /* %rdi */
AMD64_RSI_REGNUM, /* %rsi */
AMD64_RDX_REGNUM, /* %rdx */
AMD64_RCX_REGNUM, /* %rcx */
8, /* %r8 */
9 /* %r9 */
};
static int sse_regnum[] =
{
/* %xmm0 ... %xmm7 */
AMD64_XMM0_REGNUM + 0, AMD64_XMM1_REGNUM,
AMD64_XMM0_REGNUM + 2, AMD64_XMM0_REGNUM + 3,
AMD64_XMM0_REGNUM + 4, AMD64_XMM0_REGNUM + 5,
AMD64_XMM0_REGNUM + 6, AMD64_XMM0_REGNUM + 7,
};
struct value **stack_args = alloca(nargs * sizeof(struct value *));
int num_stack_args = 0;
int num_elements = 0;
int element = 0;
int integer_reg = 0;
int sse_reg = 0;
int i;
/* Reserve a register for the "hidden" argument: */
if (struct_return)
integer_reg++;
for (i = 0; i < nargs; i++)
{
struct type *type = value_type(args[i]);
int len = TYPE_LENGTH(type);
enum amd64_reg_class reg_class[2];
int needed_integer_regs = 0;
int needed_sse_regs = 0;
int j;
/* Classify argument: */
amd64_classify(type, reg_class);
/* Calculate the number of integer and SSE registers needed for
this argument. */
for (j = 0; j < 2; j++)
{
if (reg_class[j] == AMD64_INTEGER)
needed_integer_regs++;
else if (reg_class[j] == AMD64_SSE)
needed_sse_regs++;
}
/* Check whether enough registers are available, and if the
argument should be passed in registers at all. */
if (((size_t)(integer_reg + needed_integer_regs) > ARRAY_SIZE(integer_regnum))
|| ((size_t)(sse_reg + needed_sse_regs) > ARRAY_SIZE(sse_regnum))
|| ((needed_integer_regs == 0) && (needed_sse_regs == 0)))
{
/* The argument will be passed on the stack: */
num_elements += ((len + 7) / 8);
stack_args[num_stack_args++] = args[i];
}
else
{
/* The argument will be passed in registers: */
const gdb_byte *valbuf = value_contents(args[i]);
gdb_byte buf[8];
gdb_assert(len <= 16);
for (j = 0; len > 0; j++, len -= 8)
{
int regnum = -1;
int offset = 0;
switch (reg_class[j])
{
case AMD64_INTEGER:
regnum = integer_regnum[integer_reg++];
break;
case AMD64_SSE:
regnum = sse_regnum[sse_reg++];
break;
case AMD64_SSEUP:
gdb_assert(sse_reg > 0);
regnum = sse_regnum[sse_reg - 1];
offset = 8;
break;
default:
gdb_assert(!"Unexpected register class.");
}
gdb_assert(regnum != -1);
memset(buf, 0, sizeof(buf));
memcpy(buf, (valbuf + j * 8), min(len, 8));
/* APPLE LOCAL: We keep the XMM registers in "user's view"
* byte order inside gdb, so we need to unswap them before
* the ABI read/writes, which assume the byte order of the
* actual machine: */
if ((reg_class[j] == AMD64_SSE)
|| (reg_class[j] == AMD64_SSEUP))
swapped_regcache_raw_write_part(regcache, regnum, offset,
8, buf);
else
regcache_raw_write_part(regcache, regnum, offset, 8, buf);
}
}
}
/* Allocate space for the arguments on the stack: */
sp -= (num_elements * 8);
/* The psABI says that "The end of the input argument area shall be
aligned on a 16 byte boundary." */
sp &= ~0xf;
/* Write out the arguments to the stack: */
for (i = 0; i < num_stack_args; i++)
{
struct type *type = value_type(stack_args[i]);
const gdb_byte *valbuf = value_contents(stack_args[i]);
int len = TYPE_LENGTH(type);
write_memory(sp + element * 8, valbuf, len);
element += ((len + 7) / 8);
}
/* The psABI says that "For calls that may call functions that use
varargs or stdargs (prototype-less calls or calls to functions
containing ellipsis (...) in the declaration) %al is used as
hidden argument to specify the number of SSE registers used. */
regcache_raw_write_unsigned(regcache, AMD64_RAX_REGNUM, sse_reg);
return sp;
}
