static int xhci_usb_probe(struct udevice *dev)
{
struct mvebu_xhci_platdata *plat = dev_get_platdata(dev);
struct mvebu_xhci *ctx = dev_get_priv(dev);
struct xhci_hcor *hcor;
int len, ret;
struct udevice *regulator;
ctx->hcd = (struct xhci_hccr *)plat->hcd_base;
len = HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase));
hcor = (struct xhci_hcor *)((uintptr_t)ctx->hcd + len);
ret = device_get_supply_regulator(dev, "vbus-supply", ®ulator);
if (!ret) {
ret = regulator_set_enable(regulator, true);
if (ret) {
printf("Failed to turn ON the VBUS regulator\n");
return ret;
}
}
/* Enable USB xHCI (VBUS, reset etc) in board specific code */
board_xhci_enable();
return xhci_register(dev, ctx->hcd, hcor);
}
/**
* Switch power at an external regulator (for our root hub).
*
* @param ctrl pointer to the xHCI controller
* @param port port number as in the control message (one-based)
* @param enable boolean indicating whether to enable or disable power
* @return returns 0 on success, an error-code on failure
*/
static int board_usb_port_power_set(struct udevice *dev, int port,
bool enable)
{
#if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(DM_REGULATOR)
/* We start counting ports at 0, while USB counts from 1. */
int index = port - 1;
const char *regname = NULL;
struct udevice *regulator;
const char *prop = "tsd,usb-port-power";
int ret;
debug("%s: ctrl '%s' port %d enable %s\n", __func__,
dev_read_name(dev), port, enable ? "true" : "false");
ret = dev_read_string_index(dev, prop, index, ®name);
if (ret < 0) {
debug("%s: ctrl '%s' port %d: no entry in '%s'\n",
__func__, dev_read_name(dev), port, prop);
return ret;
}
ret = regulator_get_by_platname(regname, ®ulator);
if (ret) {
debug("%s: ctrl '%s' port %d: could not get regulator '%s'\n",
__func__, dev_read_name(dev), port, regname);
return ret;
}
regulator_set_enable(regulator, enable);
return 0;
#else
return -ENOTSUPP;
#endif
}
static int pwm_backlight_enable(struct udevice *dev)
{
struct pwm_backlight_priv *priv = dev_get_priv(dev);
struct dm_regulator_uclass_platdata *plat;
uint duty_cycle;
int ret;
if (priv->reg) {
plat = dev_get_uclass_platdata(priv->reg);
debug("%s: Enable '%s', regulator '%s'/'%s'\n", __func__,
dev->name, priv->reg->name, plat->name);
ret = regulator_set_enable(priv->reg, true);
if (ret) {
debug("%s: Cannot enable regulator for PWM '%s'\n",
__func__, dev->name);
return ret;
}
mdelay(120);
}
duty_cycle = priv->period_ns * (priv->default_level - priv->min_level) /
(priv->max_level - priv->min_level + 1);
ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns,
duty_cycle);
if (ret)
return ret;
ret = pwm_set_enable(priv->pwm, priv->channel, true);
if (ret)
return ret;
mdelay(10);
dm_gpio_set_value(&priv->enable, 1);
return 0;
}
static int enable_sequence(struct udevice *dev, int seq)
{
struct pwm_backlight_priv *priv = dev_get_priv(dev);
int ret;
switch (seq) {
case 0:
if (priv->reg) {
__maybe_unused struct dm_regulator_uclass_platdata
*plat;
plat = dev_get_uclass_platdata(priv->reg);
log_debug("Enable '%s', regulator '%s'/'%s'\n",
dev->name, priv->reg->name, plat->name);
ret = regulator_set_enable(priv->reg, true);
if (ret) {
log_debug("Cannot enable regulator for PWM '%s'\n",
dev->name);
return log_ret(ret);
}
mdelay(120);
}
break;
case 1:
mdelay(10);
dm_gpio_set_value(&priv->enable, 1);
break;
}
return 0;
}
void exynos_backlight_on(unsigned int on)
{
struct udevice *dev;
int ret;
debug("%s(%u)\n", __func__, on);
if (!on)
return;
ret = regulator_get_by_platname("vcd_led", &dev);
if (!ret)
ret = regulator_set_enable(dev, true);
if (ret)
debug("Failed to enable backlight: ret=%d\n", ret);
/* T5 in the LCD timing spec (defined as > 10ms) */
mdelay(10);
/* board_dp_backlight_pwm */
gpio_direction_output(EXYNOS5_GPIO_B20, 1);
/* T6 in the LCD timing spec (defined as > 10ms) */
mdelay(10);
/* try to set the backlight in the bridge registers */
ret = board_dp_set_backlight(80);
/* if we have no bridge or it does not support backlight, use a GPIO */
if (ret == -ENODEV || ret == -ENOSYS) {
gpio_request(EXYNOS5_GPIO_X30, "board_dp_backlight_en");
gpio_direction_output(EXYNOS5_GPIO_X30, 1);
}
}
int board_init(void)
{
struct udevice *pinctrl, *regulator;
int ret;
/*
* The PWM do not have decicated interrupt number in dts and can
* not get periph_id by pinctrl framework, so let's init them here.
* The PWM2 and PWM3 are for pwm regulater.
*/
ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
if (ret) {
debug("%s: Cannot find pinctrl device\n", __func__);
goto out;
}
/* Enable pwm0 for panel backlight */
ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM0);
if (ret) {
debug("%s PWM0 pinctrl init fail! (ret=%d)\n", __func__, ret);
goto out;
}
ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2);
if (ret) {
debug("%s PWM2 pinctrl init fail!\n", __func__);
goto out;
}
ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM3);
if (ret) {
debug("%s PWM3 pinctrl init fail!\n", __func__);
goto out;
}
ret = regulators_enable_boot_on(false);
if (ret)
debug("%s: Cannot enable boot on regulator\n", __func__);
ret = regulator_get_by_platname("vcc5v0_host", ®ulator);
if (ret) {
debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
goto out;
}
ret = regulator_set_enable(regulator, true);
if (ret) {
debug("%s vcc5v0-host-en set fail!\n", __func__);
goto out;
}
out:
return 0;
}
static int pwm_backlight_set_brightness(struct udevice *dev, int percent)
{
struct pwm_backlight_priv *priv = dev_get_priv(dev);
bool disable = false;
int level;
int ret;
if (!priv->enabled) {
ret = enable_sequence(dev, 0);
if (ret)
return log_ret(ret);
}
if (percent == BACKLIGHT_OFF) {
disable = true;
percent = 0;
}
if (percent == BACKLIGHT_DEFAULT) {
level = priv->default_level;
} else {
if (priv->levels) {
level = priv->levels[percent * (priv->num_levels - 1)
/ 100];
} else {
level = priv->min_level +
(priv->max_level - priv->min_level) *
percent / 100;
}
}
priv->cur_level = level;
ret = set_pwm(priv);
if (ret)
return log_ret(ret);
if (!priv->enabled) {
ret = enable_sequence(dev, 1);
if (ret)
return log_ret(ret);
priv->enabled = true;
}
if (disable) {
dm_gpio_set_value(&priv->enable, 0);
if (priv->reg) {
ret = regulator_set_enable(priv->reg, false);
if (ret)
return log_ret(ret);
}
priv->enabled = false;
}
return 0;
}
static int simple_panel_probe(struct udevice *dev)
{
struct simple_panel_priv *priv = dev_get_priv(dev);
int ret;
if (IS_ENABLED(CONFIG_DM_REGULATOR) && priv->reg) {
debug("%s: Enable regulator '%s'\n", __func__, priv->reg->name);
ret = regulator_set_enable(priv->reg, true);
if (ret)
return ret;
}
return 0;
}
int board_usb_init(int index, enum usb_init_type init)
{
#ifdef CONFIG_CMD_USB
struct udevice *dev;
int ret;
/* Set Ref freq 0 => 24MHz, 1 => 26MHz*/
/* Odroid Us have it at 24MHz, Odroid Xs at 26MHz */
if (gd->board_type == ODROID_TYPE_U3)
gpio_direction_output(EXYNOS4X12_GPIO_X30, 0);
else
gpio_direction_output(EXYNOS4X12_GPIO_X30, 1);
/* Disconnect, Reset, Connect */
gpio_direction_output(EXYNOS4X12_GPIO_X34, 0);
gpio_direction_output(EXYNOS4X12_GPIO_X35, 0);
gpio_direction_output(EXYNOS4X12_GPIO_X35, 1);
gpio_direction_output(EXYNOS4X12_GPIO_X34, 1);
/* Power off and on BUCK8 for LAN9730 */
debug("LAN9730 - Turning power buck 8 OFF and ON.\n");
ret = regulator_get_by_platname("VCC_P3V3_2.85V", &dev);
if (ret) {
error("Regulator get error: %d", ret);
return ret;
}
ret = regulator_set_enable(dev, true);
if (ret) {
error("Regulator %s enable setting error: %d", dev->name, ret);
return ret;
}
ret = regulator_set_value(dev, 750000);
if (ret) {
error("Regulator %s value setting error: %d", dev->name, ret);
return ret;
}
ret = regulator_set_value(dev, 3300000);
if (ret) {
error("Regulator %s value setting error: %d", dev->name, ret);
return ret;
}
#endif
debug("USB_udc_probe\n");
return s3c_udc_probe(&s5pc210_otg_data);
}
/* Test regulator set and get Enable method */
static int dm_test_power_regulator_set_get_enable(struct unit_test_state *uts)
{
const char *platname;
struct udevice *dev;
bool val_set = true;
/* Set the Enable of LDO1 - default is disabled */
platname = regulator_names[LDO1][PLATNAME];
ut_assertok(regulator_get_by_platname(platname, &dev));
ut_assertok(regulator_set_enable(dev, val_set));
/* Get the Enable state of LDO1 and compare it with the requested one */
ut_asserteq(regulator_get_enable(dev), val_set);
return 0;
}
void exynos_lcd_power_on(void)
{
struct udevice *dev;
int ret;
debug("%s\n", __func__);
ret = regulator_get_by_platname("lcd_vdd", &dev);
if (!ret)
ret = regulator_set_enable(dev, true);
if (ret)
debug("Failed to enable LCD panel: ret=%d\n", ret);
ret = board_dp_bridge_setup(gd->fdt_blob);
if (ret && ret != -ENODEV)
printf("LCD bridge failed to enable: %d\n", ret);
}
int board_usb_init(int index, enum usb_init_type init)
{
struct fdtdec_phandle_args args;
struct udevice *dev;
const void *blob = gd->fdt_blob;
struct clk clk;
struct phy phy;
int node;
int phy_provider;
int ret;
/* find the usb otg node */
node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2");
if (node < 0) {
debug("Not found usb_otg device\n");
return -ENODEV;
}
if (!fdtdec_get_is_enabled(blob, node)) {
debug("stm32 usbotg is disabled in the device tree\n");
return -ENODEV;
}
/* Enable clock */
ret = fdtdec_parse_phandle_with_args(blob, node, "clocks",
"#clock-cells", 0, 0, &args);
if (ret) {
debug("usbotg has no clocks defined in the device tree\n");
return ret;
}
ret = uclass_get_device_by_of_offset(UCLASS_CLK, args.node, &dev);
if (ret)
return ret;
if (args.args_count != 1) {
debug("Can't find clock ID in the device tree\n");
return -ENODATA;
}
clk.dev = dev;
clk.id = args.args[0];
ret = clk_enable(&clk);
if (ret) {
debug("Failed to enable usbotg clock\n");
return ret;
}
/* Reset */
ret = fdtdec_parse_phandle_with_args(blob, node, "resets",
"#reset-cells", 0, 0, &args);
if (ret) {
debug("usbotg has no resets defined in the device tree\n");
goto clk_err;
}
ret = uclass_get_device_by_of_offset(UCLASS_RESET, args.node, &dev);
if (ret || args.args_count != 1)
goto clk_err;
usbotg_reset.dev = dev;
usbotg_reset.id = args.args[0];
reset_assert(&usbotg_reset);
udelay(2);
reset_deassert(&usbotg_reset);
/* Get USB PHY */
ret = fdtdec_parse_phandle_with_args(blob, node, "phys",
"#phy-cells", 0, 0, &args);
if (!ret) {
phy_provider = fdt_parent_offset(blob, args.node);
ret = uclass_get_device_by_of_offset(UCLASS_PHY,
phy_provider, &dev);
if (ret)
goto clk_err;
phy.dev = dev;
phy.id = fdtdec_get_uint(blob, args.node, "reg", -1);
ret = generic_phy_power_on(&phy);
if (ret) {
debug("unable to power on the phy\n");
goto clk_err;
}
ret = generic_phy_init(&phy);
if (ret) {
debug("failed to init usb phy\n");
goto phy_power_err;
}
}
/* Parse and store data needed for gadget */
stm32mp_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
if (stm32mp_otg_data.regs_otg == FDT_ADDR_T_NONE) {
debug("usbotg: can't get base address\n");
ret = -ENODATA;
goto phy_init_err;
}
stm32mp_otg_data.rx_fifo_sz = fdtdec_get_int(blob, node,
"g-rx-fifo-size", 0);
stm32mp_otg_data.np_tx_fifo_sz = fdtdec_get_int(blob, node,
"g-np-tx-fifo-size", 0);
stm32mp_otg_data.tx_fifo_sz = fdtdec_get_int(blob, node,
"g-tx-fifo-size", 0);
/* Enable voltage level detector */
if (!(fdtdec_parse_phandle_with_args(blob, node, "usb33d-supply",
NULL, 0, 0, &args))) {
if (!uclass_get_device_by_of_offset(UCLASS_REGULATOR,
args.node, &dev)) {
ret = regulator_set_enable(dev, true);
if (ret) {
debug("Failed to enable usb33d\n");
goto phy_init_err;
}
}
}
/* Enable vbus sensing */
setbits_le32(stm32mp_otg_data.regs_otg + STM32MP_GGPIO,
STM32MP_GGPIO_VBUS_SENSING);
return dwc2_udc_probe(&stm32mp_otg_data);
phy_init_err:
generic_phy_exit(&phy);
phy_power_err:
generic_phy_power_off(&phy);
clk_err:
clk_disable(&clk);
return ret;
}
static int meson_dw_hdmi_probe(struct udevice *dev)
{
struct meson_dw_hdmi *priv = dev_get_priv(dev);
struct reset_ctl_bulk resets;
struct clk_bulk clocks;
struct udevice *supply;
int ret;
priv->dev = dev;
priv->hdmi.ioaddr = (ulong)dev_remap_addr_index(dev, 0);
if (!priv->hdmi.ioaddr)
return -EINVAL;
priv->hhi_base = dev_remap_addr_index(dev, 1);
if (!priv->hhi_base)
return -EINVAL;
priv->hdmi.hdmi_data.enc_out_bus_format = MEDIA_BUS_FMT_RGB888_1X24;
priv->hdmi.hdmi_data.enc_in_bus_format = MEDIA_BUS_FMT_YUV8_1X24;
priv->hdmi.phy_set = meson_dw_hdmi_phy_init;
priv->hdmi.write_reg = dw_hdmi_dwc_write;
priv->hdmi.read_reg = dw_hdmi_dwc_read;
priv->hdmi.i2c_clk_high = 0x67;
priv->hdmi.i2c_clk_low = 0x78;
ret = device_get_supply_regulator(dev, "hdmi-supply", &supply);
if (ret)
return ret;
ret = regulator_set_enable(supply, true);
if (ret)
return ret;
ret = reset_get_bulk(dev, &resets);
if (ret)
return ret;
ret = clk_get_bulk(dev, &clocks);
if (ret)
return ret;
ret = clk_enable_bulk(&clocks);
if (ret)
return ret;
/* Enable clocks */
dw_hdmi_hhi_update_bits(priv, HHI_HDMI_CLK_CNTL, 0xffff, 0x100);
/* Bring HDMITX MEM output of power down */
dw_hdmi_hhi_update_bits(priv, HHI_MEM_PD_REG0, 0xff << 8, 0);
/* Reset HDMITX APB & TX & PHY: cycle needed for EDID */
ret = reset_deassert_bulk(&resets);
if (ret)
return ret;
ret = reset_assert_bulk(&resets);
if (ret)
return ret;
ret = reset_deassert_bulk(&resets);
if (ret)
return ret;
/* Enable APB3 fail on error */
writel_bits(BIT(15), BIT(15), priv->hdmi.ioaddr + HDMITX_TOP_CTRL_REG);
writel_bits(BIT(15), BIT(15), priv->hdmi.ioaddr + HDMITX_DWC_CTRL_REG);
/* Bring out of reset */
dw_hdmi_top_write(&priv->hdmi, HDMITX_TOP_SW_RESET, 0);
mdelay(20);
dw_hdmi_top_write(&priv->hdmi, HDMITX_TOP_CLK_CNTL, 0xff);
dw_hdmi_init(&priv->hdmi);
dw_hdmi_phy_init(&priv->hdmi);
/* wait for connector */
ret = meson_dw_hdmi_wait_hpd(&priv->hdmi);
if (ret)
debug("hdmi can not get hpd signal\n");
return ret;
}
