Esempio n. 1
0
int __init tc_bus_get_info(struct tc_bus *tbus)
{
	if (!dec_tc_bus)
		return -ENXIO;

	memcpy(&tbus->info, rex_gettcinfo(), sizeof(tbus->info));
	tbus->slot_base = CPHYSADDR((long)rex_slot_address(0));

	switch (mips_machtype) {
	case MACH_DS5000_200:
		tbus->num_tcslots = 7;
		break;
	case MACH_DS5000_2X0:
	case MACH_DS5900:
		tbus->ext_slot_base = 0x20000000;
		tbus->ext_slot_size = 0x20000000;
		/*              */
	case MACH_DS5000_1XX:
		tbus->num_tcslots = 3;
		break;
	case MACH_DS5000_XX:
		tbus->num_tcslots = 2;
	default:
		break;
	}
	return 0;
}
Esempio n. 2
0
/*
 * the main entry
 */
static int __init tc_init(void)
{
	int tc_clock;
	int i;
	unsigned long slot0addr;
	unsigned long slot_size;

	if (!TURBOCHANNEL)
		return 0;

	for (i = 0; i < MAX_SLOT; i++) {
		tc_bus[i].base_addr = 0;
		tc_bus[i].name[0] = 0;
		tc_bus[i].vendor[0] = 0;
		tc_bus[i].firmware[0] = 0;
		tc_bus[i].interrupt = -1;
		tc_bus[i].flags = FREE;
	}

	info = rex_gettcinfo();
	slot0addr = CPHYSADDR((long)rex_slot_address(0));

	switch (mips_machtype) {
	case MACH_DS5000_200:
		num_tcslots = 7;
		break;
	case MACH_DS5000_1XX:
	case MACH_DS5000_2X0:
	case MACH_DS5900:
		num_tcslots = 3;
		break;
	case MACH_DS5000_XX:
	default:
		num_tcslots = 2;
		break;
	}

	tc_clock = 10000 / info->clk_period;

	if (info->slot_size && slot0addr) {
		pr_info("TURBOchannel rev. %d at %d.%d MHz (with%s parity)\n",
			info->revision, tc_clock / 10, tc_clock % 10,
			info->parity ? "" : "out");

		slot_size = info->slot_size << 20;

		tc_probe(slot0addr, slot_size, num_tcslots);

		for (i = 0; i < num_tcslots; i++) {
			if (!tc_bus[i].base_addr)
				continue;
			pr_info("    slot %d: %s %s %s\n", i, tc_bus[i].vendor,
				tc_bus[i].name, tc_bus[i].firmware);
		}
	}

	return 0;
}
Esempio n. 3
0
/*
 * the main entry
 */
void __init tc_init(void)
{
	int tc_clock;
	int i;
	unsigned long slot0addr;
	unsigned long slot_size;

	if (!TURBOCHANNEL)
		return;

	for (i = 0; i < MAX_SLOT; i++) {
		tc_bus[i].base_addr = 0;
		tc_bus[i].name[0] = 0;
		tc_bus[i].vendor[0] = 0;
		tc_bus[i].firmware[0] = 0;
		tc_bus[i].interrupt = -1;
		tc_bus[i].flags = FREE;
	}

	info = (tcinfo *) rex_gettcinfo();
	slot0addr = (unsigned long)KSEG1ADDR(rex_slot_address(0));

	switch (mips_machtype) {
	case MACH_DS5000_200:
		num_tcslots = 7;
		break;
	case MACH_DS5000_1XX:
	case MACH_DS5000_2X0:
	case MACH_DS5900:
		num_tcslots = 3;
		break;
	case MACH_DS5000_XX:
	default:
		num_tcslots = 2;
		break;
	}

	tc_clock = 10000 / info->clk_period;

	if (TURBOCHANNEL && info->slot_size && slot0addr) {
		printk("TURBOchannel rev. %1d at %2d.%1d MHz ", info->revision,
			tc_clock / 10, tc_clock % 10);
		printk("(with%s parity)\n", info->parity ? "" : "out");

		slot_size = info->slot_size << 20;

		tc_probe(slot0addr, slot_size, num_tcslots);

  		/*
  		 * All TURBOchannel DECstations have the onboard devices
 		 * where the (num_tcslots + 0 or 1 on DS5k/xx) Option Module
 		 * would be.
 		 */
 		if(mips_machtype == MACH_DS5000_XX)
 			i = 1;
		else
 			i = 0;

 	        system_base = slot0addr + slot_size * (num_tcslots + i);

#ifdef TC_DEBUG
		for (i = 0; i < num_tcslots; i++)
			if (tc_bus[i].base_addr) {
				printk("    slot %d: ", i);
				printk("%s %s %s\n", tc_bus[i].vendor,
					tc_bus[i].name, tc_bus[i].firmware);
			}
#endif
		ioport_resource.end = KSEG2 - 1;
	}
}