int main (void)
{
int err_code = 0;
// UART init
UartStdOutInit();
// Test banner message and revision number
puts("\nCortex Microcontroller System Design Kit");
puts(" - Simple memory test - revision $Revision: 243193 $\n");
temp_data=0;
hardfault_occurred = 0;
hardfault_expected = 0;
if (sram_test() !=0) err_code |= 1<< 0;
if (rom_test() !=0) err_code |= 1<< 1;
if (boot_rom_test() !=0) err_code |= 1<< 2;
if (apb_io_test() !=0) err_code |= 1<< 3;
if (ahb_io_test() !=0) err_code |= 1<< 4;
/* Generate test pass/fail and return value */
if (err_code==0) {
printf ("\n** TEST PASSED **\n");
} else {
printf ("\n** TEST FAILED **, Error code = (0x%x)\n", err_code);
}
UartEndSimulation();
return 0;
}
sint8 wait_for_bootrom(uint8 arg)
{
sint8 ret = M2M_SUCCESS;
uint32 reg = 0, cnt = 0;
reg = 0;
while(1) {
reg = nm_read_reg(0x1014); /* wait for efuse loading done */
if (reg & 0x80000000) {
break;
}
nm_bsp_sleep(1); /* TODO: Why bus error if this delay is not here. */
}
reg = nm_read_reg(M2M_WAIT_FOR_HOST_REG);
reg &= 0x1;
/* check if waiting for the host will be skipped or not */
if(reg == 0)
{
reg = 0;
while(reg != M2M_FINISH_BOOT_ROM)
{
nm_bsp_sleep(1);
reg = nm_read_reg(BOOTROM_REG);
if(++cnt > TIMEOUT)
{
M2M_DBG("failed to load firmware from flash.\n");
ret = M2M_ERR_INIT;
goto ERR2;
}
}
}
if(2 == arg) {
nm_write_reg(NMI_REV_REG, M2M_ATE_FW_START_VALUE);
} else {
/*bypass this step*/
}
if(REV(nmi_get_chipid()) == REV_3A0)
{
chip_apply_conf(rHAVE_USE_PMU_BIT);
}
else
{
chip_apply_conf(0);
}
nm_write_reg(BOOTROM_REG,M2M_START_FIRMWARE);
#ifdef __ROM_TEST__
rom_test();
#endif /* __ROM_TEST__ */
ERR2:
return ret;
}
