static irqreturn_t rt2400pci_interrupt(int irq, void *dev_instance)
{
struct rt2x00_dev *rt2x00dev = dev_instance;
u32 reg;
/*
* Get the interrupt sources & saved to local variable.
* Write register value back to clear pending interrupts.
*/
rt2x00pci_register_read(rt2x00dev, CSR7, ®);
rt2x00pci_register_write(rt2x00dev, CSR7, reg);
if (!reg)
return IRQ_NONE;
if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))
return IRQ_HANDLED;
/*
* Handle interrupts, walk through all bits
* and run the tasks, the bits are checked in order of
* priority.
*/
/*
* 1 - Beacon timer expired interrupt.
*/
if (rt2x00_get_field32(reg, CSR7_TBCN_EXPIRE))
rt2x00lib_beacondone(rt2x00dev);
/*
* 2 - Rx ring done interrupt.
*/
if (rt2x00_get_field32(reg, CSR7_RXDONE))
rt2x00pci_rxdone(rt2x00dev);
/*
* 3 - Atim ring transmit done interrupt.
*/
if (rt2x00_get_field32(reg, CSR7_TXDONE_ATIMRING))
rt2400pci_txdone(rt2x00dev, QID_ATIM);
/*
* 4 - Priority ring transmit done interrupt.
*/
if (rt2x00_get_field32(reg, CSR7_TXDONE_PRIORING))
rt2400pci_txdone(rt2x00dev, QID_AC_BE);
/*
* 5 - Tx ring transmit done interrupt.
*/
if (rt2x00_get_field32(reg, CSR7_TXDONE_TXRING))
rt2400pci_txdone(rt2x00dev, QID_AC_BK);
return IRQ_HANDLED;
}
static irqreturn_t rt2400pci_interrupt_thread(int irq, void *dev_instance)
{
struct rt2x00_dev *rt2x00dev = dev_instance;
u32 reg = rt2x00dev->irqvalue[0];
/*
* Handle interrupts, walk through all bits
* and run the tasks, the bits are checked in order of
* priority.
*/
/*
* 1 - Beacon timer expired interrupt.
*/
if (rt2x00_get_field32(reg, CSR7_TBCN_EXPIRE))
rt2x00lib_beacondone(rt2x00dev);
/*
* 2 - Rx ring done interrupt.
*/
if (rt2x00_get_field32(reg, CSR7_RXDONE))
rt2x00pci_rxdone(rt2x00dev);
/*
* 3 - Atim ring transmit done interrupt.
*/
if (rt2x00_get_field32(reg, CSR7_TXDONE_ATIMRING))
rt2400pci_txdone(rt2x00dev, QID_ATIM);
/*
* 4 - Priority ring transmit done interrupt.
*/
if (rt2x00_get_field32(reg, CSR7_TXDONE_PRIORING))
rt2400pci_txdone(rt2x00dev, QID_AC_BE);
/*
* 5 - Tx ring transmit done interrupt.
*/
if (rt2x00_get_field32(reg, CSR7_TXDONE_TXRING))
rt2400pci_txdone(rt2x00dev, QID_AC_BK);
/* Enable interrupts again. */
rt2x00dev->ops->lib->set_device_state(rt2x00dev,
STATE_RADIO_IRQ_ON_ISR);
return IRQ_HANDLED;
}
static void rt2400pci_txstatus_tasklet(unsigned long data)
{
struct rt2x00_dev *rt2x00dev = (struct rt2x00_dev *)data;
u32 reg;
rt2400pci_txdone(rt2x00dev, QID_ATIM);
rt2400pci_txdone(rt2x00dev, QID_AC_VO);
rt2400pci_txdone(rt2x00dev, QID_AC_VI);
if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags)) {
spin_lock_irq(&rt2x00dev->irqmask_lock);
rt2x00pci_register_read(rt2x00dev, CSR8, ®);
rt2x00_set_field32(®, CSR8_TXDONE_TXRING, 0);
rt2x00_set_field32(®, CSR8_TXDONE_ATIMRING, 0);
rt2x00_set_field32(®, CSR8_TXDONE_PRIORING, 0);
rt2x00pci_register_write(rt2x00dev, CSR8, reg);
spin_unlock_irq(&rt2x00dev->irqmask_lock);
}
}
