/*! \brief Set timer period.Called from Qdebug .
*/
void set_timer_period(uint16_t time)
{
rtc_count_set_compare(&rtc_instance,time,RTC_COUNT_COMPARE_0);
//! [enable]
rtc_count_enable(&rtc_instance);
}
/*! \brief Configure the RTC timer count after which interrupts comes
*/
void configure_rtc_count(void)
{
//! [init_conf]
struct rtc_count_config config_rtc_count;
typedef enum rtc_count_prescaler rtc_count_prescaler_t;
#if DEF_SURF_LOW_POWER_SENSOR_ENABLE == 1
struct rtc_count_events config_rtc_event =
{
.generate_event_on_periodic[DEF_LOWPOWER_SENSOR_EVENT_PERIODICITY] = true
};
#endif
rtc_count_get_config_defaults(&config_rtc_count);
volatile uint16_t temp;
//! [set_config]
config_rtc_count.prescaler = (rtc_count_prescaler_t)RTC_MODE0_CTRL_PRESCALER_DIV2;
config_rtc_count.mode = RTC_COUNT_MODE_32BIT;
#ifdef FEATURE_RTC_CONTINUOUSLY_UPDATED
config_rtc_count.continuously_update = true;
#endif
config_rtc_count.clear_on_match = true;
//! [init_rtc]
rtc_count_init(&rtc_instance, RTC, &config_rtc_count);
#if DEF_SURF_LOW_POWER_SENSOR_ENABLE == 1
/* Enable RTC events */
config_rtc_event.generate_event_on_periodic[DEF_LOWPOWER_SENSOR_EVENT_PERIODICITY] = true;
rtc_count_enable_events(&rtc_instance, &config_rtc_event);
#endif
/*Set timer period */
temp = TIME_PERIOD_1MSEC * rtc_timer_msec;
rtc_count_set_compare(&rtc_instance, temp, RTC_COUNT_COMPARE_0);
//! [enable]
rtc_count_enable(&rtc_instance);
//! [enable]
}
/*! \brief Initialize timer
*
*/
void timer_init(void)
{
/* Configure and enable RTC */
configure_rtc_count();
/* Configure and enable callback */
configure_rtc_callbacks();
}
static void _rtc_timer_start(uint32_t ms)
{
uint32_t compare = 0;
compare = (uint32_t)(32.768 * ms);
// rtc_count_register_callback(&rtc_instance, _rtc_timer_int_cb, RTC_COUNT_CALLBACK_COMPARE_0);
rtc_count_enable_callback(&rtc_instance, RTC_COUNT_CALLBACK_COMPARE_0);
rtc_count_set_count(&rtc_instance, 0);
rtc_count_set_compare(&rtc_instance, compare, RTC_COUNT_COMPARE_0);
rtc_count_enable(&rtc_instance);
}
/*---------------------------------------------------------------------------*/
void
rtimer_arch_schedule(rtimer_clock_t t)
{
rtimer_clock_t now;
/* Retrieve current RTC counter value */
now = RTIMER_NOW();
/*
* New value must be 5 ticks in the future. The ST may tick once while we're
* writing the registers. We play it safe here and we add a bit of leeway
*/
if ((rtimer_clock_t)(t - now) < 7) {
t = now + 7;
}
/* Set value for compare (use channel 0) */
rtc_count_set_compare(&rtc_instance, t, RTC_COUNT_COMPARE_0);
/* Enable compare callback */
rtc_count_enable_callback(&rtc_instance, RTC_COUNT_CALLBACK_COMPARE_0);
}
/**
* \internal Applies the given configuration.
*
* Sets the configurations given from the configuration structure to the
* hardware module.
*
* \param[in,out] module Pointer to the software instance struct
* \param[in] config Pointer to the configuration structure.
*
* \return Status of the configuration procedure.
* \retval STATUS_OK RTC configurations was set successfully.
* \retval STATUS_ERR_INVALID_ARG If invalid argument(s) were given.
*/
static enum status_code _rtc_count_set_config(
struct rtc_module *const module,
const struct rtc_count_config *const config)
{
/* Sanity check arguments */
Assert(module);
Assert(module->hw);
Rtc *const rtc_module = module->hw;
rtc_module->MODE0.CTRL.reg = RTC_MODE0_CTRL_MODE(0) | config->prescaler;
/* Set mode and clear on match if applicable. */
switch (config->mode) {
case RTC_COUNT_MODE_32BIT:
/* Set 32bit mode and clear on match if applicable. */
rtc_module->MODE0.CTRL.reg |= RTC_MODE0_CTRL_MODE(0);
/* Check if clear on compare match should be set. */
if (config->clear_on_match) {
/* Set clear on match. */
rtc_module->MODE0.CTRL.reg |= RTC_MODE0_CTRL_MATCHCLR;
}
/* Set compare values. */
for (uint8_t i = 0; i < RTC_NUM_OF_COMP32; i++) {
while (rtc_count_is_syncing(module)) {
/* Wait for synchronization */
}
rtc_count_set_compare(module, config->compare_values[i],
(enum rtc_count_compare)i);
}
break;
case RTC_COUNT_MODE_16BIT:
/* Set 16bit mode. */
rtc_module->MODE1.CTRL.reg |= RTC_MODE1_CTRL_MODE(1);
/* Check if match on clear is set, and return invalid
* argument if set. */
if (config->clear_on_match) {
Assert(false);
return STATUS_ERR_INVALID_ARG;
}
/* Set compare values. */
for (uint8_t i = 0; i < RTC_NUM_OF_COMP16; i++) {
while (rtc_count_is_syncing(module)) {
/* Wait for synchronization */
}
rtc_count_set_compare(module, config->compare_values[i],
(enum rtc_count_compare)i);
}
break;
default:
Assert(false);
return STATUS_ERR_INVALID_ARG;
}
/* Check to set continuously clock read update mode. */
if (config->continuously_update) {
/* Set continuously mode. */
rtc_module->MODE0.READREQ.reg |= RTC_READREQ_RCONT;
}
/* Return status OK if everything was configured. */
return STATUS_OK;
}
void rtc_set_compare(uint32_t compare_value, uint8_t comp_index)
{
rtc_count_set_compare(&rtc_instance, compare_value, comp_index);
}
/**
* \internal Applies the given configuration.
*
* Sets the configurations given from the configuration structure to the
* hardware module
*
* \param[in,out] module Pointer to the software instance struct
* \param[in] config Pointer to the configuration structure
*
* \return Status of the configuration procedure.
* \retval STATUS_OK RTC configurations was set successfully
* \retval STATUS_ERR_INVALID_ARG If invalid argument(s) were given
*/
static enum status_code _rtc_count_set_config(
struct rtc_module *const module,
const struct rtc_count_config *const config)
{
/* Sanity check arguments */
Assert(module);
Assert(module->hw);
Rtc *const rtc_module = module->hw;
#if SAML21
rtc_module->MODE0.CTRLA.reg = RTC_MODE0_CTRLA_MODE(0)
#if (SAML21XXXB)
| (config->enable_read_sync << RTC_MODE0_CTRLA_COUNTSYNC_Pos)
#endif
| config->prescaler;
#endif
#if (SAMC20) || (SAMC21) || (SAML22)
rtc_module->MODE0.CTRLA.reg = RTC_MODE0_CTRLA_MODE(0) | config->prescaler
| (config->enable_read_sync << RTC_MODE0_CTRLA_COUNTSYNC_Pos);
#endif
/* Set mode and clear on match if applicable. */
switch (config->mode) {
case RTC_COUNT_MODE_32BIT:
/* Set 32-bit mode and clear on match if applicable. */
rtc_module->MODE0.CTRLA.reg |= RTC_MODE0_CTRLA_MODE(0);
/* Check if clear on compare match should be set. */
if (config->clear_on_match) {
/* Set clear on match. */
rtc_module->MODE0.CTRLA.reg |= RTC_MODE0_CTRLA_MATCHCLR;
}
/* Set compare values. */
for (uint8_t i = 0; i < RTC_COMP32_NUM; i++) {
rtc_count_set_compare(module, config->compare_values[i],
(enum rtc_count_compare)i);
}
break;
case RTC_COUNT_MODE_16BIT:
/* Set 16bit mode. */
rtc_module->MODE1.CTRLA.reg |= RTC_MODE1_CTRLA_MODE(1);
/* Check if match on clear is set, and return invalid
* argument if set. */
if (config->clear_on_match) {
Assert(false);
return STATUS_ERR_INVALID_ARG;
}
/* Set compare values. */
for (uint8_t i = 0; i < RTC_NUM_OF_COMP16; i++) {
rtc_count_set_compare(module, config->compare_values[i],
(enum rtc_count_compare)i);
}
break;
default:
Assert(false);
return STATUS_ERR_INVALID_ARG;
}
/* Return status OK if everything was configured. */
return STATUS_OK;
}
