int
rtl8367r_switch_init()
{
// Power up all LAN ports
rtk_port_phy_data_t pData;
rtk_port_phyReg_get(1, PHY_CONTROL_REG, &pData);
pData &= (~CONTROL_REG_PORT_POWER_BIT);
rtk_port_phyReg_set(1, PHY_CONTROL_REG, pData);
rtk_port_phyReg_get(2, PHY_CONTROL_REG, &pData);
pData &= (~CONTROL_REG_PORT_POWER_BIT);
rtk_port_phyReg_set(2, PHY_CONTROL_REG, pData);
rtk_port_phyReg_get(3, PHY_CONTROL_REG, &pData);
pData &= (~CONTROL_REG_PORT_POWER_BIT);
rtk_port_phyReg_set(3, PHY_CONTROL_REG, pData);
rtk_port_phyReg_get(4, PHY_CONTROL_REG, &pData);
pData &= (~CONTROL_REG_PORT_POWER_BIT);
rtk_port_phyReg_set(4, PHY_CONTROL_REG, pData);
LANWANPartition_8367r();
rtl8367r_switch_inited = 1;
return RT_ERR_OK;
}
static void rtl8367_port_power(int port, int powerOn)
{
#define PHY_CONTROL_REG 0
#define CONTROL_REG_PORT_POWER_BIT 0x800
rtk_api_ret_t retVal;
rtk_port_phy_data_t reg_data;
if (port < 0 || port > RTK_PHY_ID_MAX)
return;
retVal = rtk_port_phyReg_get(port, PHY_CONTROL_REG, ®_data);
if (retVal == RT_ERR_OK) {
if (powerOn)
reg_data &= ~CONTROL_REG_PORT_POWER_BIT;
else
reg_data |= CONTROL_REG_PORT_POWER_BIT;
rtk_port_phyReg_set(port, PHY_CONTROL_REG, reg_data);
}
}
static int port_phyReg_set(int argc, char *argv[]){
int rv;
int c;
rtk_uint32 port = 0;
rtk_port_phy_reg_t reg = PHY_REG_CONTROL;
rtk_port_phy_data_t regData = 0;
static const char * shortopts = "p:r:d:";
static const struct option longopts[] = {
{"port", required_argument, NULL, 'p'},
{"reg", required_argument, NULL, 'r'},
{"data", required_argument, NULL, 'd'},
{NULL, 0, NULL, 0}
};
while((c = getopt_long(argc,argv,shortopts,longopts,NULL)) != -1){
switch(c){
case 'p':
port = strtol(optarg, NULL, 0);
break;
case 'r':
reg = strtol(optarg, NULL, 0);
break;
case 'd':
regData = strtol(optarg, NULL, 0);
break;
default:
break;
}
}
rv = rtk_port_phyReg_set(port, reg, regData);
if(rv){
printf("port phyReg set error!");
return 1;
}
return 0;
}
int
rtl8367r_switch_init_pre()
{
rtk_api_ret_t retVal;
unsigned long gpiomode;
set_mdc_to_gpio_mode();
smi_reset();
// after reset, switch need to delay 1 ms
// if not, SMI may send out unknown data
udelay(1000);
smi_init();
test_smi_signal_and_wait();
retVal = rtk_switch_init();
printf("rtk_switch_init(): return %d\n", retVal);
if (retVal != RT_ERR_OK) return retVal;
//
// RALINK uses RGMII to connect switch IC directly
// we need to set the MDIO mode here
//
rtk_port_mac_ability_t mac_cfg;
mac_cfg.forcemode = MAC_FORCE;
mac_cfg.speed = SPD_1000M;
mac_cfg.duplex = FULL_DUPLEX;
mac_cfg.link = PORT_LINKUP;
mac_cfg.nway = DISABLED;
mac_cfg.txpause = ENABLED;
mac_cfg.rxpause = ENABLED;
retVal = rtk_port_macForceLinkExt_set (1, MODE_EXT_RGMII,&mac_cfg);
printf("rtk_port_macForceLinkExt_set(): return %d\n", retVal);
int input_txDelay = 1;
int input_rxDelay = 2;
printf("input_txDelay:%d, input_rxDelay:%d\n", input_txDelay, input_rxDelay);
retVal = rtk_port_rgmiiDelayExt_set(1, input_txDelay, input_rxDelay);
printf("rtk_port_rgmiiDelayExt_set(): return %d\n", retVal);
// power down all LAN ports
// this is to force DHCP IP address new when PC cable connects to LAN port
rtk_port_phy_data_t pData;
rtk_port_phyReg_get(1, PHY_CONTROL_REG, &pData);
printf("** rtk_port_phyReg_get = %x\n", pData);
pData |= CONTROL_REG_PORT_POWER_BIT;
rtk_port_phyReg_set(1, PHY_CONTROL_REG, pData);
rtk_port_phyReg_get(2, PHY_CONTROL_REG, &pData);
printf("** rtk_port_phyReg_get = %x\n", pData);
pData |= CONTROL_REG_PORT_POWER_BIT;
rtk_port_phyReg_set(2, PHY_CONTROL_REG, pData);
rtk_port_phyReg_get(3, PHY_CONTROL_REG, &pData);
printf("** rtk_port_phyReg_get = %x\n", pData);
pData |= CONTROL_REG_PORT_POWER_BIT;
rtk_port_phyReg_set(3, PHY_CONTROL_REG, pData);
rtk_port_phyReg_get(4, PHY_CONTROL_REG, &pData);
printf("** rtk_port_phyReg_get = %x\n", pData);
pData |= CONTROL_REG_PORT_POWER_BIT;
rtk_port_phyReg_set(4, PHY_CONTROL_REG, pData);
/*
{
int i;
for (i=0; i<8; i++)
{
rtk_port_phy_data_t pData;
rtk_port_phyReg_get(i, 1, &pData);
printf("** %d rtk_port_phyReg_get = %x\n", i, pData);
}
}
*/
/*
{
// read EXT MAC status
// seems not works
rtk_uint32 data;
rtk_api_ret_t retVal;
if((retVal = rtl8367b_getAsicReg(0x1305, &data)) != RT_ERR_OK)
{
printf("error = %d\n", retVal);
}
printf("data = %x\n", data);
if((retVal = rtl8367b_getAsicReg(0x1311, &data)) != RT_ERR_OK)
{
printf("error = %d\n", retVal);
}
printf("data = %x\n", data);
//data 1305 = c010
//data 1311 = 1076
}
*/
rtl8367r_switch_inited = 1;
return RT_ERR_OK;
}
