static int __init s3c_adc_probe(struct platform_device *pdev) { struct resource *res; struct device *dev; int ret; int size; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); dev = &pdev->dev; if(res == NULL){ dev_err(dev,"no memory resource specified\n"); return -ENOENT; } size = (res->end - res->start) + 1; #ifndef ADC_WITH_TOUCHSCREEN adc_mem = request_mem_region(res->start, size, pdev->name); if(adc_mem == NULL){ dev_err(dev, "failed to get memory region\n"); ret = -ENOENT; goto err_req; } #endif base_addr = ioremap(res->start, size); if(base_addr == NULL){ dev_err(dev,"fail to ioremap() region\n"); ret = -ENOENT; goto err_map; } adc_clock = clk_get(&pdev->dev, "adc"); if(IS_ERR(adc_clock)){ dev_err(dev,"failed to fine ADC clock source\n"); ret = PTR_ERR(adc_clock); goto err_clk; } clk_enable(adc_clock); /* read platform data from device struct */ plat_data = s3c_adc_get_platdata(&pdev->dev); if ((plat_data->presc & 0xff) > 0) writel(S3C_ADCCON_PRSCEN | S3C_ADCCON_PRSCVL(plat_data->presc & 0xff), base_addr + S3C_ADCCON); else writel(0, base_addr+S3C_ADCCON); /* Initialise registers */ if ((plat_data->delay & 0xffff) > 0) writel(plat_data->delay & 0xffff, base_addr + S3C_ADCDLY); if (plat_data->resolution == 12) writel(readl(base_addr + S3C_ADCCON) | S3C_ADCCON_RESSEL_12BIT, base_addr + S3C_ADCCON); ret = misc_register(&s3c_adc_miscdev); if (ret) { printk (KERN_ERR "cannot register miscdev on minor=%d (%d)\n", ADC_MINOR, ret); goto err_clk; } ready_to_work = 1; printk(KERN_INFO "S3C64XX ADC driver successfully probed !\n"); return 0; err_clk: clk_disable(adc_clock); clk_put(adc_clock); err_map: iounmap(base_addr); #ifndef ADC_WITH_TOUCHSCREEN err_req: release_resource(adc_mem); kfree(adc_mem); #endif return ret; }
static int __devinit s3c_adc_probe(struct platform_device *pdev) { struct resource *res; struct device *dev; int ret; int size; g_ts0_base = ioremap(0xE1700000, 1024); if (g_ts0_base == NULL) { printk("ts0 base map failed\n"); return -ENOENT; } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); dev = &pdev->dev; if (res == NULL) { dev_err(dev, "no memory resource specified\n"); return -ENOENT; } size = (res->end - res->start) + 1; adc_mem = request_mem_region(res->start, size, pdev->name); if (adc_mem == NULL) { dev_err(dev, "failed to get memory region\n"); ret = -ENOENT; goto err_req; } base_addr = ioremap(res->start, size); if (base_addr == NULL) { dev_err(dev, "fail to ioremap() region\n"); ret = -ENOENT; goto err_map; } adc_clock = clk_get(&pdev->dev, "adc"); if (IS_ERR(adc_clock)) { dev_err(dev, "failed to fine ADC clock source\n"); ret = PTR_ERR(adc_clock); goto err_clk; } clk_enable(adc_clock); /* read platform data from device struct */ plat_data = s3c_adc_get_platdata(&pdev->dev); if ((plat_data->presc & 0xff) > 0) writel(S3C_ADCCON_PRSCEN | S3C_ADCCON_PRSCVL(plat_data->presc & 0xff), base_addr + S3C_ADCCON); else writel(0, base_addr + S3C_ADCCON); /* Initialise registers */ if ((plat_data->delay & 0xffff) > 0) writel(plat_data->delay & 0xffff, base_addr + S3C_ADCDLY); if (plat_data->resolution == 12) writel(readl(base_addr + S3C_ADCCON) | S3C_ADCCON_RESSEL_12BIT, base_addr + S3C_ADCCON); //writel((readl(base_addr + S3C_ADCCON) | S3C_ADCCON_STDBM) & ~S3C_ADCCON_PRSCEN, //base_addr + S3C_ADCCON); s3c_adc_restore_SFR_on_ADC(); ret = misc_register(&s3c_adc_miscdev); if (ret) { printk(KERN_ERR "cannot register miscdev on minor=%d (%d)\n", ADC_MINOR, ret); goto err_clk; } return 0; err_clk: clk_disable(adc_clock); clk_put(adc_clock); err_map: iounmap(base_addr); err_req: release_resource(adc_mem); kfree(adc_mem); return ret; }