static void exynos4210_uart_interrupt(int irq, void *data, struct cpu_user_regs *regs)
{
struct serial_port *port = data;
struct exynos4210_uart *uart = port->uart;
unsigned int status;
status = exynos4210_read(uart, UINTP);
while ( status != 0 )
{
/* Clear all pending interrupts
* but should take care of ERROR and MODEM
*/
if ( status & UINTM_ERROR )
{
uint32_t error_bit;
error_bit = exynos4210_read(uart, UERSTAT);
if ( error_bit & UERSTAT_OVERRUN )
dprintk(XENLOG_ERR, "uart: overrun error\n");
if ( error_bit & UERSTAT_PARITY )
dprintk(XENLOG_ERR, "uart: parity error\n");
if ( error_bit & UERSTAT_FRAME )
dprintk(XENLOG_ERR, "uart: frame error\n");
if ( error_bit & UERSTAT_BREAK )
dprintk(XENLOG_ERR, "uart: break detected\n");
/* Clear error pending interrupt */
exynos4210_write(uart, UINTP, UINTM_ERROR);
}
if ( status & (UINTM_RXD | UINTM_ERROR) )
{
/* uart->regs[UINTM] |= RXD|ERROR; */
serial_rx_interrupt(port, regs);
/* uart->regs[UINTM] &= ~(RXD|ERROR); */
exynos4210_write(uart, UINTP, UINTM_RXD | UINTM_ERROR);
}
if ( status & (UINTM_TXD | UINTM_MODEM) )
{
/* uart->regs[UINTM] |= TXD|MODEM; */
serial_tx_interrupt(port, regs);
/* uart->regs[UINTM] &= ~(TXD|MODEM); */
exynos4210_write(uart, UINTP, UINTM_TXD | UINTM_MODEM);
}
status = exynos4210_read(uart, UINTP);
}
}
static void omap_uart_interrupt(int irq, void *data, struct cpu_user_regs *regs)
{
struct serial_port *port = data;
struct omap_uart *uart = port->uart;
u32 lsr;
uint32_t reg;
while ( !(omap_read(uart, UART_IIR) & UART_IIR_NOINT) )
{
lsr = omap_read(uart, UART_LSR) & 0xff;
if ( lsr & UART_LSR_THRE )
serial_tx_interrupt(port, regs);
if ( lsr & UART_LSR_DR )
serial_rx_interrupt(port, regs);
if ( port->txbufc == port->txbufp ) {
reg = omap_read(uart, UART_IER);
omap_write(uart, UART_IER, reg & (~UART_IER_ETHREI));
}
};
}
void Interrupt() {
//INTCONbits.GIE = 0;
if (RCIF_bit) {
serial_rx_interrupt();
return;
}
//Test PIE1bits.TXIE because TXIF is always set even when interrupts for usart are disable
if (TXIE_bit && TXIF_bit) {
serial_tx_interrupt();
return;
}
if (TMR1IF_bit) {
TMR1IF_bit = 0;
stepper_interrupt();
return;
}
//INTCONbits.GIE = 1;
}
static void __ns16550_poll(struct cpu_user_regs *regs)
{
struct serial_port *port = this_cpu(poll_port);
struct ns16550 *uart = port->uart;
if ( uart->intr_works )
return; /* Interrupts work - no more polling */
if ( uart->probing ) {
uart->probing = 0;
if ( (ns_read_reg(uart, LSR) & 0xff) == 0xff )
return; /* All bits set - probably no UART present */
}
while ( ns_read_reg(uart, LSR) & LSR_DR )
serial_rx_interrupt(port, regs);
if ( ns_read_reg(uart, LSR) & LSR_THRE )
serial_tx_interrupt(port, regs);
set_timer(&uart->timer, NOW() + MILLISECS(uart->timeout_ms));
}
static void ns16550_interrupt(
int irq, void *dev_id, struct cpu_user_regs *regs)
{
struct serial_port *port = dev_id;
struct ns16550 *uart = port->uart;
if (uart->intr_works == 0)
{
uart->probing = 0;
uart->intr_works = 1;
stop_timer(&uart->timer);
}
while ( !(ns_read_reg(uart, IIR) & IIR_NOINT) )
{
char lsr = ns_read_reg(uart, LSR);
if ( lsr & LSR_THRE )
serial_tx_interrupt(port, regs);
if ( lsr & LSR_DR )
serial_rx_interrupt(port, regs);
}
}