int ITG3200::init(byte address, byte _SRateDiv, byte _Range, byte _filterBW, byte _ClockSrc, bool _ITGReady, bool _INTRawDataReady) {
int a=0;
// _dev_address = address;
// //this needs to be debugged
// a=readFrom(_dev_address,WHO_AM_I,1,_buff);
// MYASSERT(a,"Failed to write to register\n\r")
// usart_printfm(USARTx,(const int *)"Succesfully read from register\n\r");
// usart_printfm(USARTx,(const int *)"Value of the who am i register %d \n\r",_buff[0]);
// // a=writeTo(_dev_address,WHO_AM_I,66);
// // MYASSERT(a,"Failed to write 2 register2\n\r")
// // usart_printfm(USARTx,(const int *)"Succesfully written to register2\n\r");
// a=readFrom(_dev_address,WHO_AM_I,1,_buff);
// usart_printfm(USARTx,(const int *)"Value of the who am i register %d \n\r",_buff[0]);
// MYASSERT(a,"Failed to write to register\n\r")
// //this is needed to be debugged
// usart_printfm(USARTx,(const int *)"Value of address:%2x\n\r",_dev_address);
a=setSampleRateDiv(_SRateDiv);
MYASSERT(a,"Failed to set sample rate div\n\r")
a=setFSRange(_Range);
MYASSERT(a,"Failed to set range\n\r")
a=setFilterBW(_filterBW);
MYASSERT(a,"Failed to set filter BW\n\r")
a=setClockSource(_ClockSrc);
MYASSERT(a,"Failed to set clocksrc\n\r")
a=setITGReady(_ITGReady);
MYASSERT(a,"Failed to set ITG ready\n\r")
a=setRawDataReady(_INTRawDataReady);
MYASSERT(a,"Failed to set data ready mode\n\r")
ms_delay(GYROSTART_UP_DELAY); // startup
return 0;
}
void ITG3200::init(unsigned int address, byte _SRateDiv, byte _Range, byte _filterBW, byte _ClockSrc, bool _ITGReady, bool _INTRawDataReady) {
_dev_address = address;
setSampleRateDiv(_SRateDiv);
setFSRange(_Range);
setFilterBW(_filterBW);
setClockSource(_ClockSrc);
setITGReady(_ITGReady);
setRawDataReady(_INTRawDataReady);
delay(GYROSTART_UP_DELAY); // startup
}
