Esempio n. 1
0
File: bcd.cpp Progetto: iver6/BA
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::DAS(bxInstruction_c *i)
{
  /* The algorithm for DAS is fashioned after the pseudo code in the
   * Pentium Processor Family Developer's Manual, volume 3.  It seems
   * to have changed from earlier processor's manuals.  I'm not sure
   * if this is a correction in the algorithm printed, or Intel has
   * changed the handling of instruction. Validated against Intel
   * Pentium family hardware.
   */

  Bit8u tmpAL = AL;
  int tmpCF = 0, tmpAF = 0;

  /* DAS effect the following flags: A,C,S,Z,P */

  if (((tmpAL & 0x0F) > 0x09) || get_AF())
  {
    tmpCF = (AL < 0x06) || get_CF();
    AL = AL - 0x06;
    tmpAF = 1;
  }

  if ((tmpAL > 0x99) || get_CF())
  {
    AL = AL - 0x60;
    tmpCF = 1;
  }

  SET_FLAGS_OSZAPC_LOGIC_8(AL);
  set_CF(tmpCF);
  set_AF(tmpAF);

  BX_NEXT_INSTR(i);
}
Esempio n. 2
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File: bcd.cpp Progetto: iver6/BA
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AAS(bxInstruction_c *i)
{
  int tmpCF = 0, tmpAF = 0;

  /* AAS affects the following flags: A,C */

  if (((AL & 0x0F) > 0x09) || get_AF())
  {
    AX = AX - 0x106;
    tmpAF = tmpCF = 1;
  }

  AL = AL & 0x0f;

  /* AAS affects also the following flags: Z,S,O,P */
  /* modification of the flags is undocumented */

  /* The following behaviour seems to match the P6 and
     its derived processors. */
  SET_FLAGS_OSZAPC_LOGIC_8(AL);
  set_CF(tmpCF);
  set_AF(tmpAF);

  BX_NEXT_INSTR(i);
}
Esempio n. 3
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File: bcd.cpp Progetto: iver6/BA
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::DAA(bxInstruction_c *i)
{
  Bit8u tmpAL = AL;
  int   tmpCF = 0, tmpAF = 0;

  /* Validated against Intel Pentium family hardware. */

  // DAA affects the following flags: S,Z,A,P,C

  if (((tmpAL & 0x0F) > 0x09) || get_AF())
  {
    tmpCF = ((AL > 0xF9) || get_CF());
    AL = AL + 0x06;
    tmpAF = 1;
  }

  if ((tmpAL > 0x99) || get_CF())
  {
    AL = AL + 0x60;
    tmpCF = 1;
  }

  SET_FLAGS_OSZAPC_LOGIC_8(AL);
  set_CF(tmpCF);
  set_AF(tmpAF);

  BX_NEXT_INSTR(i);
}
Esempio n. 4
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void tlcs870_device::do_XOR_CF_gbit(const uint8_t opbyte0, const uint8_t opbyte1)
{
	/*
	    OP                (opbyte0) (immval0) (opbyte1) (immval1) (immval2)    JF ZF CF HF   cycles
	    XOR CF, g.b       1110 1ggg           1101 0bbb                        ~C -  *  -    2
	*/
	m_cycles = 2;

	const uint8_t bitpos = opbyte1 & 0x7;
	const uint8_t bitused = 1 << bitpos;

	const uint8_t g = get_reg8(opbyte0 & 0x7);

	const uint8_t bit = g & bitused;

	if (is_CF())
	{
		if (bit)
		{
			clear_CF();
		}
		else
		{
			set_CF();
		}
	}
	else
	{
		if (bit)
		{
			set_CF();
		}
		else
		{
			clear_CF();
		}
	}

	// JF ends up being whatever the new value of CF is
	if (is_CF())
		set_JF();
	else
		clear_JF();
}
Esempio n. 5
0
File: bcd.cpp Progetto: iver6/BA
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AAA(bxInstruction_c *i)
{
  int tmpCF = 0, tmpAF = 0;

  /*
   *  Note: This instruction incorrectly documented in Intel's materials.
   *        The right description is:
   *
   *    IF (((AL and 0FH) > 9) or (AF==1)
   *    THEN
   *        IF CPU<286 THEN {  AL <- AL+6 }
   *                   ELSE {  AX <- AX+6 }
   *        AH <- AH+1
   *        CF <- 1
   *        AF <- 1
   *    ELSE
   *        CF <- 0
   *        AF <- 0
   *    ENDIF
   *	AL <- AL and 0Fh
   */	

  /* Validated against Intel Pentium family hardware. */

  /* AAA affects the following flags: A,C */

  if (((AL & 0x0f) > 9) || get_AF())
  {
    AX = AX + 0x106;
    tmpAF = tmpCF = 1;
  }

  AL = AL & 0x0f;

  /* AAA affects also the following flags: Z,S,O,P */
  /* modification of the flags is undocumented */

  /* The following behaviour seems to match the P6 and
     its derived processors. */
  SET_FLAGS_OSZAPC_LOGIC_8(AL);
  set_CF(tmpCF);
  set_AF(tmpAF);

  BX_NEXT_INSTR(i);
}
Esempio n. 6
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void tlcs870_device::do_LD_CF_gbit(const uint8_t opbyte0, const uint8_t opbyte1)
{
	/*
	    OP                (opbyte0) (immval0) (opbyte1) (immval1) (immval2)    JF ZF CF HF   cycles
	    LD CF, g.b        1110 1ggg           1101 1bbb                        ~C -  *  -    2

	    aka TEST g.b
	*/
	m_cycles = 2;

	const uint8_t bitpos = opbyte1 & 0x7;
	const uint8_t bitused = 1 << bitpos;

	const uint8_t g = get_reg8(opbyte0 & 0x7);

	const uint8_t bit = g & bitused;

	bit ? set_CF() : clear_CF();
	// for this optype of operation ( LD CF, *.b ) the Jump Flag always ends up the inverse of the Carry Flag
	bit ? clear_JF() : set_JF();
}
Esempio n. 7
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void tlcs870_device::do_LD_CF_inpp_indirectbit(const uint8_t opbyte0, const uint8_t opbyte1)
{
	/*
	    OP                (opbyte0) (immval0) (opbyte1) (immval1) (immval2)    JF ZF CF HF   cycles
	    LD CF, (DE).g     1110 1ggg           1001 1110                        ~C -  *  -    4
	    LD CF, (HL).g     1110 1ggg           1001 1111                        ~C -  *  -    4

	    aka aka TEST (pp).g
	*/
	m_cycles = 4;

	const uint8_t bitpos = get_reg8(opbyte0 & 7) & 0x7;
	const uint8_t bitused = 1 << bitpos;
	const uint16_t addr = get_reg16((opbyte1 & 1) + 2); // DE or HL
	const uint8_t val = RM8(addr);

	const uint8_t bit = val & bitused;

	bit ? set_CF() : clear_CF();
	// for this optype of operation ( LD CF, *.b ) the Jump Flag always ends up the inverse of the Carry Flag
	bit ? clear_JF() : set_JF();
}