static void esky_init(u8 bind) { NRF24L01_Initialize(); // 2-bytes CRC, radio off NRF24L01_WriteReg(NRF24L01_00_CONFIG, BV(NRF24L01_00_EN_CRC) | BV(NRF24L01_00_CRCO)); NRF24L01_WriteReg(NRF24L01_01_EN_AA, 0x00); // No Auto Acknoledgement NRF24L01_WriteReg(NRF24L01_02_EN_RXADDR, 0x01); // Enable data pipe 0 if (bind) { set_bind_address(); } else { set_data_address(); } NRF24L01_WriteReg(NRF24L01_04_SETUP_RETR, 0); // No auto retransmission NRF24L01_WriteReg(NRF24L01_05_RF_CH, 50); // Channel 50 for bind packets NRF24L01_SetBitrate(0); // 1Mbps NRF24L01_SetPower(Model.tx_power); NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit // NRF24L01_WriteReg(NRF24L01_08_OBSERVE_TX, 0x00); // no write bits in this field // NRF24L01_WriteReg(NRF24L01_00_CD, 0x00); // same // NRF24L01_WriteReg(NRF24L01_0C_RX_ADDR_P2, 0xC3); // LSB byte of pipe 2 receive address // NRF24L01_WriteReg(NRF24L01_0D_RX_ADDR_P3, 0xC4); // NRF24L01_WriteReg(NRF24L01_0E_RX_ADDR_P4, 0xC5); // NRF24L01_WriteReg(NRF24L01_0F_RX_ADDR_P5, 0xC6); NRF24L01_WriteReg(NRF24L01_11_RX_PW_P0, PAYLOADSIZE); // bytes of data payload for pipe 0 NRF24L01_WriteReg(NRF24L01_12_RX_PW_P1, PAYLOADSIZE); NRF24L01_WriteReg(NRF24L01_13_RX_PW_P2, PAYLOADSIZE); NRF24L01_WriteReg(NRF24L01_14_RX_PW_P3, PAYLOADSIZE); NRF24L01_WriteReg(NRF24L01_15_RX_PW_P4, PAYLOADSIZE); NRF24L01_WriteReg(NRF24L01_16_RX_PW_P5, PAYLOADSIZE); NRF24L01_WriteReg(NRF24L01_17_FIFO_STATUS, 0x00); // Just in case, no real bits to write here }
static void esky_init(u8 bind) { NRF24L01_Initialize(); // 2-bytes CRC, radio off NRF24L01_WriteReg(NRF24L01_00_CONFIG, BV(NRF24L01_00_EN_CRC) | BV(NRF24L01_00_CRCO)); NRF24L01_WriteReg(NRF24L01_01_EN_AA, 0x00); // No Auto Acknoledgement NRF24L01_WriteReg(NRF24L01_02_EN_RXADDR, 0x01); // Enable data pipe 0 if (bind) { set_bind_address(); } else { set_data_address(); } NRF24L01_WriteReg(NRF24L01_04_SETUP_RETR, 0); // No auto retransmission NRF24L01_WriteReg(NRF24L01_05_RF_CH, 50); // Channel 50 for bind packets NRF24L01_SetBitrate(0); // 1Mbps NRF24L01_SetPower(Model.tx_power); NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit // NRF24L01_WriteReg(NRF24L01_08_OBSERVE_TX, 0x00); // no write bits in this field // NRF24L01_WriteReg(NRF24L01_00_CD, 0x00); // same // NRF24L01_WriteReg(NRF24L01_0C_RX_ADDR_P2, 0xC3); // LSB byte of pipe 2 receive address // NRF24L01_WriteReg(NRF24L01_0D_RX_ADDR_P3, 0xC4); // NRF24L01_WriteReg(NRF24L01_0E_RX_ADDR_P4, 0xC5); // NRF24L01_WriteReg(NRF24L01_0F_RX_ADDR_P5, 0xC6); NRF24L01_WriteReg(NRF24L01_11_RX_PW_P0, PAYLOADSIZE); // bytes of data payload for pipe 0 NRF24L01_WriteReg(NRF24L01_12_RX_PW_P1, PAYLOADSIZE); NRF24L01_WriteReg(NRF24L01_13_RX_PW_P2, PAYLOADSIZE); NRF24L01_WriteReg(NRF24L01_14_RX_PW_P3, PAYLOADSIZE); NRF24L01_WriteReg(NRF24L01_15_RX_PW_P4, PAYLOADSIZE); NRF24L01_WriteReg(NRF24L01_16_RX_PW_P5, PAYLOADSIZE); NRF24L01_WriteReg(NRF24L01_17_FIFO_STATUS, 0x00); // Just in case, no real bits to write here // Check for Beken BK2421/BK2423 chip // It is done by using Beken specific activate code, 0x53 // and checking that status register changed appropriately // There is no harm to run it on nRF24L01 because following // closing activate command changes state back even if it // does something on nRF24L01 NRF24L01_Activate(0x53); // magic for BK2421 bank switch printf("Trying to switch banks\n"); if (NRF24L01_ReadReg(NRF24L01_07_STATUS) & 0x80) { printf("BK2421 detected\n"); // Beken registers don't have such nice names, so we just mention // them by their numbers // It's all magic, eavesdropped from real transfer and not even from the // data sheet - it has slightly different values NRF24L01_WriteRegisterMulti(0x00, (u8 *) "\x40\x4B\x01\xE2", 4); NRF24L01_WriteRegisterMulti(0x01, (u8 *) "\xC0\x4B\x00\x00", 4); NRF24L01_WriteRegisterMulti(0x02, (u8 *) "\xD0\xFC\x8C\x02", 4); NRF24L01_WriteRegisterMulti(0x03, (u8 *) "\xF9\x00\x39\x21", 4); NRF24L01_WriteRegisterMulti(0x04, (u8 *) "\xC1\x96\x9A\x1B", 4); NRF24L01_WriteRegisterMulti(0x05, (u8 *) "\x24\x06\x7F\xA6", 4); NRF24L01_WriteRegisterMulti(0x0C, (u8 *) "\x00\x12\x73\x00", 4); NRF24L01_WriteRegisterMulti(0x0D, (u8 *) "\x46\xB4\x80\x00", 4); NRF24L01_WriteRegisterMulti(0x0E, (u8 *) "\x41\x10\x04\x82\x20\x08\x08\xF2\x7D\xEF\xFF", 11); NRF24L01_WriteRegisterMulti(0x04, (u8 *) "\xC7\x96\x9A\x1B", 4); NRF24L01_WriteRegisterMulti(0x04, (u8 *) "\xC1\x96\x9A\x1B", 4); } else { printf("nRF24L01 detected\n"); } NRF24L01_Activate(0x53); // switch bank back // Implicit delay in callback // delay(50); }