/* convert 32-bit float to 64-bit int */
uint32_t HELPER(cgebr)(CPUS390XState *env, uint32_t r1, uint32_t f2,
uint32_t m3)
{
float32 v2 = env->fregs[f2].l.upper;
set_round_mode(env, m3);
env->regs[r1] = float32_to_int64(v2, &env->fpu_status);
return set_cc_nz_f32(v2);
}
/* absolute value of 32-bit float */
uint32_t HELPER(lpebr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
{
float32 v1;
float32 v2 = env->fregs[f2].d;
v1 = float32_abs(v2);
env->fregs[f1].d = v1;
return set_cc_nz_f32(v1);
}
/* 32-bit FP subtraction RR */
uint32_t HELPER(sebr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
{
env->fregs[f1].l.upper = float32_sub(env->fregs[f1].l.upper,
env->fregs[f2].l.upper,
&env->fpu_status);
HELPER_LOG("%s: adding 0x%d resulting in 0x%d in f%d\n", __func__,
env->fregs[f2].l.upper, env->fregs[f1].l.upper, f1);
return set_cc_nz_f32(env->fregs[f1].l.upper);
}
/* load complement of 32-bit float */
uint32_t HELPER(lcebr)(CPUS390XState *env, uint32_t f1, uint32_t f2)
{
env->fregs[f1].l.upper = float32_chs(env->fregs[f2].l.upper);
return set_cc_nz_f32(env->fregs[f1].l.upper);
}
static uint32_t do_calc_cc(CPUS390XState *env, uint32_t cc_op,
uint64_t src, uint64_t dst, uint64_t vr)
{
S390CPU *cpu = s390_env_get_cpu(env);
uint32_t r = 0;
switch (cc_op) {
case CC_OP_CONST0:
case CC_OP_CONST1:
case CC_OP_CONST2:
case CC_OP_CONST3:
/* cc_op value _is_ cc */
r = cc_op;
break;
case CC_OP_LTGT0_32:
r = cc_calc_ltgt0_32(dst);
break;
case CC_OP_LTGT0_64:
r = cc_calc_ltgt0_64(dst);
break;
case CC_OP_LTGT_32:
r = cc_calc_ltgt_32(src, dst);
break;
case CC_OP_LTGT_64:
r = cc_calc_ltgt_64(src, dst);
break;
case CC_OP_LTUGTU_32:
r = cc_calc_ltugtu_32(src, dst);
break;
case CC_OP_LTUGTU_64:
r = cc_calc_ltugtu_64(src, dst);
break;
case CC_OP_TM_32:
r = cc_calc_tm_32(src, dst);
break;
case CC_OP_TM_64:
r = cc_calc_tm_64(src, dst);
break;
case CC_OP_NZ:
r = cc_calc_nz(dst);
break;
case CC_OP_ADD_64:
r = cc_calc_add_64(src, dst, vr);
break;
case CC_OP_ADDU_64:
r = cc_calc_addu_64(src, dst, vr);
break;
case CC_OP_ADDC_64:
r = cc_calc_addc_64(src, dst, vr);
break;
case CC_OP_SUB_64:
r = cc_calc_sub_64(src, dst, vr);
break;
case CC_OP_SUBU_64:
r = cc_calc_subu_64(src, dst, vr);
break;
case CC_OP_SUBB_64:
r = cc_calc_subb_64(src, dst, vr);
break;
case CC_OP_ABS_64:
r = cc_calc_abs_64(dst);
break;
case CC_OP_NABS_64:
r = cc_calc_nabs_64(dst);
break;
case CC_OP_COMP_64:
r = cc_calc_comp_64(dst);
break;
case CC_OP_ADD_32:
r = cc_calc_add_32(src, dst, vr);
break;
case CC_OP_ADDU_32:
r = cc_calc_addu_32(src, dst, vr);
break;
case CC_OP_ADDC_32:
r = cc_calc_addc_32(src, dst, vr);
break;
case CC_OP_SUB_32:
r = cc_calc_sub_32(src, dst, vr);
break;
case CC_OP_SUBU_32:
r = cc_calc_subu_32(src, dst, vr);
break;
case CC_OP_SUBB_32:
r = cc_calc_subb_32(src, dst, vr);
break;
case CC_OP_ABS_32:
r = cc_calc_abs_32(dst);
break;
case CC_OP_NABS_32:
r = cc_calc_nabs_32(dst);
break;
case CC_OP_COMP_32:
r = cc_calc_comp_32(dst);
break;
case CC_OP_ICM:
r = cc_calc_icm(src, dst);
break;
case CC_OP_SLA_32:
r = cc_calc_sla_32(src, dst);
break;
case CC_OP_SLA_64:
r = cc_calc_sla_64(src, dst);
break;
case CC_OP_FLOGR:
r = cc_calc_flogr(dst);
break;
case CC_OP_NZ_F32:
r = set_cc_nz_f32(dst);
break;
case CC_OP_NZ_F64:
r = set_cc_nz_f64(dst);
break;
case CC_OP_NZ_F128:
r = set_cc_nz_f128(make_float128(src, dst));
break;
default:
cpu_abort(CPU(cpu), "Unknown CC operation: %s\n", cc_name(cc_op));
}
HELPER_LOG("%s: %15s 0x%016lx 0x%016lx 0x%016lx = %d\n", __func__,
cc_name(cc_op), src, dst, vr, r);
return r;
}
