int pcmcia_read_cis_mem(struct pcmcia_socket *s, int attr, u_int addr,
u_int len, void *ptr)
{
void __iomem *sys, *end;
unsigned char *buf = ptr;
cs_dbg(s, 3, "pcmcia_read_cis_mem(%d, %#x, %u)\n", attr, addr, len);
if (attr & IS_INDIRECT) {
/* Indirect accesses use a bunch of special registers at fixed
locations in common memory */
u_char flags = ICTRL0_COMMON|ICTRL0_AUTOINC|ICTRL0_BYTEGRAN;
if (attr & IS_ATTR) {
addr *= 2;
flags = ICTRL0_AUTOINC;
}
sys = set_cis_map(s, 0, MAP_ACTIVE | ((cis_width) ? MAP_16BIT : 0));
if (!sys) {
memset(ptr, 0xff, len);
return -1;
}
writeb(flags, sys+CISREG_ICTRL0);
writeb(addr & 0xff, sys+CISREG_IADDR0);
writeb((addr>>8) & 0xff, sys+CISREG_IADDR1);
writeb((addr>>16) & 0xff, sys+CISREG_IADDR2);
writeb((addr>>24) & 0xff, sys+CISREG_IADDR3);
for ( ; len > 0; len--, buf++)
*buf = readb(sys+CISREG_IDATA0);
} else {
int read_cis_mem(socket_info_t *s, int attr, u_int addr,
u_int len, void *ptr)
{
pccard_mem_map *mem = &s->cis_mem;
u_char *sys, *buf = ptr;
DEBUG(3, "cs: read_cis_mem(%d, %#x, %u)\n", attr, addr, len);
if (setup_cis_mem(s) != 0) {
memset(ptr, 0xff, len);
return -1;
}
mem->flags = MAP_ACTIVE | ((cis_width) ? MAP_16BIT : 0);
if (attr & IS_INDIRECT) {
/* Indirect accesses use a bunch of special registers at fixed
locations in common memory */
u_char flags = ICTRL0_COMMON|ICTRL0_AUTOINC|ICTRL0_BYTEGRAN;
if (attr & IS_ATTR) { addr *= 2; flags = ICTRL0_AUTOINC; }
mem->card_start = 0; mem->flags = MAP_ACTIVE;
set_cis_map(s, mem);
sys = s->cis_virt;
bus_writeb(s->cap.bus, flags, sys+CISREG_ICTRL0);
bus_writeb(s->cap.bus, addr & 0xff, sys+CISREG_IADDR0);
bus_writeb(s->cap.bus, (addr>>8) & 0xff, sys+CISREG_IADDR1);
bus_writeb(s->cap.bus, (addr>>16) & 0xff, sys+CISREG_IADDR2);
bus_writeb(s->cap.bus, (addr>>24) & 0xff, sys+CISREG_IADDR3);
for ( ; len > 0; len--, buf++)
*buf = bus_readb(s->cap.bus, sys+CISREG_IDATA0);
} else {