/*
* power down s3c-udc power & disable otg clock
*/
void s3c_udc_power_down(void)
{
struct s3c_udc *dev = the_controller;
unsigned long flags;
/* Confirm No caller with spin_lock come here */
if (dev->udc_state != USB_STATE_SUSPENDED && dev->gadget.speed != USB_SPEED_UNKNOWN ) {
//s3c_udc_set_disconnect_state(dev);
S3C_UDC_LOCK_IRQSAVE(&dev->lock, flags);
s3c_udc_stop_activity(dev, dev->driver);
S3C_UDC_UNLOCK_IRQRESTORE(&dev->lock, flags);
}
if(dev->udc_state > USB_STATE_NOTATTACHED) {
/* s3c_udc_disable() set dev->udc_state = USB_STATE_NOTATTACHED; */
s3c_udc_disable(dev);
S3C_UDC_POWER_OFF:
if(dev->clocked) {
if (!IS_ERR(otg_clock) && otg_clock != NULL) {
clk_disable(otg_clock);
dev->clocked = 0;
DEBUG_PM("[%s] clk_disable() OK.\n", __func__);
}
else
DEBUG_ERROR("[%s] otg_clock error\n", __func__);
}
else
DEBUG_PM("[%s] already clk_disabled\n", __func__);
fsa9480_s3c_udc_off();
if(dev->clocked) {
/* Just in case */
DEBUG_ERROR("\n[%s] readl(S3C_UDC_OTG_GINTMSK) || dev->clocked\n", __func__);
DEBUG_ERROR("\n[%s] Power OFF again.\n", __func__);
goto S3C_UDC_POWER_OFF;
}
DEBUG_PM("[%s] \n", __func__);
}
else {
DEBUG_PM("[%s] skipped , already powered off\n", __func__);
if(dev->clocked) {
/* Just in case */
DEBUG_ERROR("\n[%s] readl(S3C_UDC_OTG_GINTMSK) || dev->clocked\n", __func__);
DEBUG_ERROR("\n[%s] Power OFF again.\n", __func__);
goto S3C_UDC_POWER_OFF;
}
}
dev->powered = 0;
#ifdef CONFIG_CPU_FREQ
set_dvfs_level(1);
#endif /* CONFIG_CPU_FREQ */
}
/*
* power up s3c-udc power & enable otg clock
*/
void s3c_udc_power_up(void)
{
struct s3c_udc *dev = the_controller;
#ifdef CONFIG_CPU_FREQ
set_dvfs_level(0);
#endif /* CONFIG_CPU_FREQ */
if(dev->udc_state == USB_STATE_NOTATTACHED) {
DEBUG_PM("[%s] \n", __func__);
S3C_UDC_POWER_UP:
fsa9480_s3c_udc_on();
if(!dev->clocked) {
if(clk_enable(otg_clock) != 0) {
DEBUG_ERROR("\n[%s] clk_enable(otg_clock) failed.\n", __func__);
}
else {
dev->clocked = 1;
DEBUG_PM("\n[%s] clk_enable(otg_clock) OK.\n", __func__);
}
}
else
DEBUG_PM("\n[%s] already clk_enabled.\n", __func__);
if(s3c_udc_enable(dev) != 0 || !dev->clocked) {
/* Just in case */
DEBUG_ERROR("\n[%s] FAIL TO s3c_udc_enable()\n", __func__);
DEBUG_ERROR("\n[%s] Power UP again.\n", __func__);
goto S3C_UDC_POWER_UP;
}
else
DEBUG_PM("\n[%s] POWER-UP OK!.\n", __func__);
}
else {
DEBUG_PM("[%s] skipped , already powered up\n", __func__);
if(!readl(S3C_UDC_OTG_GINTMSK) || !dev->clocked) {
/* Just in case */
DEBUG_ERROR("\n[%s] !readl(S3C_UDC_OTG_GINTMSK) || !dev->clocked\n", __func__);
DEBUG_ERROR("\n[%s] Power UP again.\n", __func__);
goto S3C_UDC_POWER_UP;
}
}
dev->powered = 1;
}
static int fimc_release(struct file *filp)
{
struct fimc_control *ctrl = filp->private_data;
struct s3c_platform_fimc *pdata;
unsigned long flags;
int ret = 0, i;
#ifdef VIEW_FUNCTION_CALL
printk("[FIMC_DEV] %s(%d)\n", __func__, __LINE__);
#endif
pdata = to_fimc_plat(ctrl->dev);
atomic_dec(&ctrl->in_use);
filp->private_data = NULL;
/* FIXME: turning off actual working camera */
if (ctrl->cam) {
/* shutdown the MCLK */
clk_disable(ctrl->cam->clk);
/* shutdown */
if (ctrl->cam->cam_power)
ctrl->cam->cam_power(0);
/* should be initialized at the next open */
ctrl->cam->initialized = 0;
}
if (ctrl->cap) {
for (i = 0; i < FIMC_CAPBUFS; i++) {
fimc_dma_free(ctrl, &ctrl->cap->bufs[i], 0);
fimc_dma_free(ctrl, &ctrl->cap->bufs[i], 1);
}
kfree(ctrl->cap);
ctrl->cap = NULL;
}
if (ctrl->out) {
if (ctrl->status != FIMC_STREAMOFF) {
ret = fimc_outdev_stop_streaming(ctrl);
if (ret < 0)
dev_err(ctrl->dev,
"Fail: fimc_stop_streaming\n");
ctrl->status = FIMC_STREAMOFF;
}
kfree(ctrl->out);
ctrl->out = NULL;
}
if (pdata->clk_off)
pdata->clk_off(to_platform_device(ctrl->dev), ctrl->clk);
#ifdef S5P6442_POWER_GATING_CAM
// gFIMC_CNT--;
if(ctrl->id == CAM_ID){
spin_lock_irqsave(&fimc_domain_lock, flags);
s5p6442_idle_pm_gpiocfg(S5P6442_CAM_ID, S5P6442_LP_MODE);
gFIMC_CNT[ctrl->id]--;
if((gFIMC_CNT[0] <= 0) && (gFIMC_CNT[1] <= 0) && (gFIMC_CNT[2] <= 0)){
s5p6442_pwrgate_config(S5P6442_CAM_ID, S5P6442_LP_MODE);
}
spin_unlock_irqrestore(&fimc_domain_lock, flags);
}
#endif
#ifdef CONFIG_CPU_FREQ
if(ctrl->id == CAM_ID){
set_dvfs_level(1);
}
#endif /* CONFIG_CPU_FREQ */
dev_info(ctrl->dev, "%s: successfully released\n", __func__);
return 0;
}
static int fimc_open(struct file *filp)
{
struct fimc_control *ctrl;
struct s3c_platform_fimc *pdata;
unsigned long flags;
int ret;
u32 cfg;
#ifdef VIEW_FUNCTION_CALL
printk("[FIMC_DEV] %s(%d)\n", __func__, __LINE__);
#endif
/* An ugly hack to make the i2c pins output low */
if (unlikely(make_i2c_pin_low == 1)) {
cfg = readl(S5P64XX_GPD1DAT);
cfg &= ~(0x1 << 0);
writel(cfg, S5P64XX_GPD1DAT);
cfg = readl(S5P64XX_GPD1DAT);
cfg &= ~(0x1 << 1);
writel(cfg, S5P64XX_GPD1DAT);
make_i2c_pin_low = 0;
}
ctrl = video_get_drvdata(video_devdata(filp));
#ifdef S5P6442_POWER_GATING_CAM
del_timer(&g_fimc_domain_timer);
// fimc0 controller for Camera
if(ctrl->id == CAM_ID){
spin_lock_irqsave(&fimc_domain_lock, flags);
gFIMC_CNT[CAM_ID]++;
s5p6442_idle_pm_gpiocfg(S5P6442_CAM_ID, S5P6442_ACTIVE_MODE);
s5p6442_pwrgate_config(S5P6442_CAM_ID, S5P6442_ACTIVE_MODE);
spin_unlock_irqrestore(&fimc_domain_lock, flags);
}
// gFIMC_CNT++;
// }
#endif
#ifdef CONFIG_CPU_FREQ
if(ctrl->id == CAM_ID){
set_dvfs_level(0);
}
#endif /* CONFIG_CPU_FREQ */
pdata = to_fimc_plat(ctrl->dev);
mutex_lock(&ctrl->lock);
if (atomic_read(&ctrl->in_use)) {
ret = -EBUSY;
goto resource_busy;
} else {
atomic_inc(&ctrl->in_use);
}
if (pdata->clk_on)
pdata->clk_on(to_platform_device(ctrl->dev), ctrl->clk);
/* Apply things to interface register */
fimc_hwset_reset(ctrl);
filp->private_data = ctrl;
ctrl->fb.open_fifo = s3cfb_open_fifo;
ctrl->fb.close_fifo = s3cfb_close_fifo;
ret = s3cfb_direct_ioctl(ctrl->id, S3CFB_GET_LCD_WIDTH,
(unsigned long)&ctrl->fb.lcd_hres);
if (ret < 0)
dev_err(ctrl->dev, "Fail: S3CFB_GET_LCD_WIDTH\n");
ret = s3cfb_direct_ioctl(ctrl->id, S3CFB_GET_LCD_HEIGHT,
(unsigned long)&ctrl->fb.lcd_vres);
if (ret < 0)
dev_err(ctrl->dev, "Fail: S3CFB_GET_LCD_HEIGHT\n");
ctrl->status = FIMC_STREAMOFF;
#if 0
/* To do : have to send ctrl to the fimd driver. */
ret = s3cfb_direct_ioctl(ctrl->id, S3CFB_SET_SUSPEND_FIFO,
(unsigned long)fimc_sleep);
if (ret < 0)
dev_err(ctrl->dev,
"s3cfb_direct_ioctl(S3CFB_SET_SUSPEND_FIFO) fail\n");
ret = s3cfb_direct_ioctl(ctrl->id, S3CFB_SET_RESUME_FIFO,
(unsigned long)fimc_wakeup);
if (ret < 0)
dev_err(ctrl->dev,
"s3cfb_direct_ioctl(S3CFB_SET_SUSPEND_FIFO) fail\n");
#endif
mutex_unlock(&ctrl->lock);
return 0;
resource_busy:
mutex_unlock(&ctrl->lock);
return ret;
}
static int s3c_mfc_release(struct inode *inode, struct file *file)
{
MFC_HANDLE *handle = NULL;
MFCINST_DEC_INBUF_TYPE inbuf_type;
int ret;
MFC_Mutex_Lock();
#ifdef CONFIG_MACH_SATURN
lcd_gamma_change(LCD_IDLE); // when finishing playing video, AMOLED gamma change to idle mode
#endif
#if 1 //mfc.error.recovery
// If the last issued command is timed out, reset the MFC for error recovery
// When MFC doesn't respond with DEC_INIT command (timeout)
// It seems that it doesn't operate normally. It doesn't even respond
// to swfi command and locks up the cpu when going to sleep.
// (SWFI instruction waits for the response from the DOMAIN-V)
//
if(mfc_critial_error) {
printk(KERN_ERR "\x1b[1;31m" "@#@#@# Reset mfc for error recovery" "\x1b[0m \n");
MFC_HW_Init();
}
#endif
handle = (MFC_HANDLE *)file->private_data;
if (handle->mfc_inst == NULL) {
ret = -1;
goto err_handle;
};
//printk("Exit MFC Linux Driver\n");
inbuf_type = handle->mfc_inst->inbuf_type;
LOG_MSG(LOG_TRACE, "mfc_release", "delete inst no : %d\n", handle->mfc_inst->inst_no);
#if (MFC_LINE_RING_SHARE == 1)
// In case of (MFC_LINE_RING_SHARE == 1), all the instances were reserved.
// Therefore the instances need to be released.
if (inbuf_type == DEC_INBUF_RING_BUF) {
MfcInstPool_ReleaseAll();
}
#endif
MFCInst_Delete(handle->mfc_inst);
kfree(handle);
#ifdef USE_MFC_DOMAIN_GATING
CLOCK_DISABLE;
#endif /* USE_MFC_DOMAIN_GATING */
_openhandle_count--;
if(_openhandle_count == 0) {
#if defined(CONFIG_S3C6400_KDPMD) || defined(CONFIG_S3C6400_KDPMD_MODULE)
mfc_pmdev.state = DEV_IDLE;
kdpmd_set_event(mfc_pmdev.devid, KDPMD_DRVCLOSE);
kdpmd_wakeup();
kdpmd_wait(mfc_pmdev.devid);
#endif
#ifdef CONFIG_CPU_FREQ
set_dvfs_level(1);
#endif /* CONFIG_CPU_FREQ */
#ifdef USE_MFC_DOMAIN_GATING
DOMAIN_POWER_OFF;
#endif /* USE_MFC_DOMAIN_GATING */
}
ret = 0;
err_handle:
MFC_Mutex_Release();
return ret;
}
static int s3c_mfc_open(struct inode *inode, struct file *file)
{
MFC_HANDLE *handle;
int ret;
//////////////////
// Mutex Lock //
//////////////////
MFC_Mutex_Lock();
#ifdef USE_MFC_DOMAIN_GATING
if(_openhandle_count == 0) {
DOMAIN_POWER_ON;
}
#endif /* USE_MFC_DOMAIN_GATING */
_openhandle_count++;
#ifdef USE_MFC_DOMAIN_GATING
CLOCK_ENABLE;
#endif /* USE_MFC_DOMAIN_GATING */
if(_openhandle_count == 1) {
#if defined(CONFIG_S3C6400_KDPMD) || defined(CONFIG_S3C6400_KDPMD_MODULE)
kdpmd_set_event(mfc_pmdev.devid, KDPMD_DRVOPEN);
kdpmd_wakeup();
kdpmd_wait(mfc_pmdev.devid);
mfc_pmdev.state = DEV_RUNNING;
printk("mfc_open woke up\n");
#endif
//////////////////////////////////////
// 3. MFC Hardware Initialization //
//////////////////////////////////////
if (MFC_HW_Init() == FALSE)
{
ret = -ENODEV;
goto err_MFC_HW_Init;
}
}
handle = (MFC_HANDLE *)kzalloc(sizeof(MFC_HANDLE), GFP_KERNEL);
if(!handle) {
LOG_MSG(LOG_ERROR, "s3c_mfc_open", "MFC open error\n");
ret = -1;
goto err_kzmalloc;
}
//////////////////////////////
// MFC Instance creation //
//////////////////////////////
handle->mfc_inst = MFCInst_Create();
if (handle->mfc_inst == NULL) {
LOG_MSG(LOG_ERROR, "s3c_mfc_open", "MFC Instance allocation was failed!\r\n");
ret = -1;
goto err_MFCInst_Create;
}
/*
* MFC supports multi-instance. so each instance have own data structure
* It saves file->private_data
*/
file->private_data = (MFC_HANDLE *)handle;
#ifdef CONFIG_CPU_FREQ
set_dvfs_level(0);
#endif /* CONFIG_CPU_FREQ */
LOG_MSG(LOG_TRACE, "mfc_open", "MFC open success! \r\n");
ret = 0;
goto no_err;
err_MFCInst_Create:
kfree (handle);
err_kzmalloc:
err_MFC_HW_Init:
#ifdef USE_MFC_DOMAIN_GATING
CLOCK_DISABLE;
#endif /* USE_MFC_DOMAIN_GATING */
_openhandle_count --;
#ifdef USE_MFC_DOMAIN_GATING
if(_openhandle_count == 0)
DOMAIN_POWER_OFF;
#endif /* USE_MFC_DOMAIN_GATING */
no_err:
MFC_Mutex_Release();
return ret;
}