void local_flush_tlb_all(void)
{
unsigned long flags;
unsigned long old_ctx;
int entry;
#ifdef DEBUG_TLB
printk("[tlball]");
#endif
__save_and_cli(flags);
/* Save old context and create impossible VPN2 value */
old_ctx = (get_entryhi() & 0xff);
set_entryhi(KSEG0);
set_entrylo0(0);
set_entrylo1(0);
BARRIER;
entry = get_wired();
/* Blast 'em all away. */
while(entry < mips_cpu.tlbsize) {
/* Make sure all entries differ. */
set_entryhi(KSEG0+entry*0x2000);
set_index(entry);
BARRIER;
tlb_write_indexed();
BARRIER;
entry++;
}
BARRIER;
set_entryhi(old_ctx);
__restore_flags(flags);
}
void local_flush_tlb_range(struct mm_struct *mm, unsigned long start,
unsigned long end)
{
if (CPU_CONTEXT(smp_processor_id(), mm) != 0) {
unsigned long flags;
int size;
#ifdef DEBUG_TLB
printk("[tlbrange<%02x,%08lx,%08lx>]", (mm->context & 0xff),
start, end);
#endif
__save_and_cli(flags);
size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
size = (size + 1) >> 1;
if(size <= mips_cpu.tlbsize/2) {
int oldpid = (get_entryhi() & 0xff);
int newpid = (CPU_CONTEXT(smp_processor_id(), mm) &
0xff);
start &= (PAGE_MASK << 1);
end += ((PAGE_SIZE << 1) - 1);
end &= (PAGE_MASK << 1);
while(start < end) {
int idx;
set_entryhi(start | newpid);
start += (PAGE_SIZE << 1);
BARRIER;
tlb_probe();
BARRIER;
idx = get_index();
set_entrylo0(0);
set_entrylo1(0);
if(idx < 0)
continue;
/* Make sure all entries differ. */
set_entryhi(KSEG0+idx*0x2000);
BARRIER;
tlb_write_indexed();
BARRIER;
}
set_entryhi(oldpid);
} else {
get_new_mmu_context(mm, smp_processor_id());
if (mm == current->active_mm)
set_entryhi(CPU_CONTEXT(smp_processor_id(),
mm) & 0xff);
}
__restore_flags(flags);
}
void flush_tlb_all(void)
{
unsigned long flags;
unsigned long old_ctx;
int entry;
__save_and_cli(flags);
/* Save old context and create impossible VPN2 value */
old_ctx = (get_entryhi() & 0xff);
set_entrylo0(0);
set_entrylo1(0);
for (entry = 0; entry < tlb_entries; entry++) {
set_entryhi(KSEG0 + (PAGE_SIZE << 1) * entry);
set_index(entry);
tlb_write_indexed();
}
set_entryhi(old_ctx);
__restore_flags(flags);
}
void local_flush_tlb_range(struct mm_struct *mm, unsigned long start,
unsigned long end)
{
if (mm->context != 0) {
unsigned long flags;
int size;
#ifdef DEBUG_TLB
printk("[tlbrange<%lu,0x%08lx,0x%08lx>]",
(mm->context & 0xfc0), start, end);
#endif
save_and_cli(flags);
size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
if (size <= mips_cpu.tlbsize) {
int oldpid = (get_entryhi() & 0xfc0);
int newpid = (mm->context & 0xfc0);
start &= PAGE_MASK;
end += (PAGE_SIZE - 1);
end &= PAGE_MASK;
while (start < end) {
int idx;
set_entryhi(start | newpid);
start += PAGE_SIZE;
tlb_probe();
idx = get_index();
set_entrylo0(0);
set_entryhi(KSEG0);
if (idx < 0)
continue;
tlb_write_indexed();
}
set_entryhi(oldpid);
} else {
get_new_mmu_context(mm, smp_processor_id());
if (mm == current->active_mm)
set_entryhi(mm->context & 0xfc0);
}
restore_flags(flags);
}