static void Sync(void) { setprg2r(0x10, 0x0800, 0); setprg2r(0x10, 0x1000, 1); setprg2r(0x10, 0x1800, 2); setprg8r(0x10, 0x6000, 1); setprg16(0x8000, 0); setprg16(0xC000, ~0); setchr8(0); }
static void MALEEReset(void) { setprg2r(0x10,0x7000,0); SetReadHandler(0x8000,0xFFFF,CartBR); SetReadHandler(0x6000,0x67FF,CartBR); SetReadHandler(0x7000,0x77FF,CartBR); setprg2r(1,0x6000,0); setprg32(0x8000,0); setchr8(0); }
static void MALEEReset(CartInfo *info) { memset(WRAM, 0x00, 2048); setprg2r(0x10,0x7000,0); SetReadHandler(0x8000,0xFFFF,CartBR); SetReadHandler(0x6000,0x67ff,CartBR); SetReadHandler(0x7000,0x77FF,CartBR); SetWriteHandler(0x7000,0x77FF,MWrite); setprg2r(1,0x6000,0); setprg32(0x8000,0); setchr8(0); }
static void Sync(void) { setchr8(0); setprg8(0x6000, reg); setprg8(0x8000, 0xc); setprg4(0xa000, (0xd << 1)); setprg2(0xb000, (0xd << 2) + 2); setprg2r(0x10, 0xb800, 4); setprg2r(0x10, 0xc000, 5); setprg2r(0x10, 0xc800, 6); setprg2r(0x10, 0xd000, 7); setprg2(0xd800, (0xe << 2) + 3); setprg8(0xe000, 0xf); }
static void Sync(void) { setprg2r(0,0xE000,0); setprg2r(0,0xE800,0); setprg2r(0,0xF000,0); setprg2r(0,0xF800,0); setprg8r(1,0x6000,3); setprg8r(1,0x8000,0); setprg8r(1,0xA000,1); setprg8r(1,0xC000,2); setchr8(chr & 1); setmirror(MI_V); }
static void Sync(void) { setchr8(0); setprg8(0x8000, 0xc); setprg8(0xe000, 0xf); if (reg2 & 0x10) { setprg8(0x6000, reg0); setprg8(0xa000, 0xd); setprg8(0xc000, 0xe); } else { setprg8r(0x10, 0x6000, 0); setprg4(0xa000, (0xd << 1)); setprg2(0xb000, (0xd << 2) + 2); setprg2r(0x10, 0xb800, 4); setprg2r(0x10, 0xc000, 5); setprg2r(0x10, 0xc800, 6); setprg2r(0x10, 0xd000, 7); setprg2(0xd800, (0xe << 2) + 3); } setmirror(reg1 ^ 1); }
static void Sync(void) { setprg2r(0x10, 0x6800, 0); setprg8(0x8000, regs[0]); setprg8(0xA000, regs[1]); setprg8(0xC000, regs[2]); setprg8(0xE000, regs[3]); setchr2(0x0000, regs[4]); setchr2(0x0800, regs[5]); setchr2(0x1000, regs[6]); setchr2(0x1800, regs[7]); }
static void Reset(CartInfo *info) { int x; for(x = 0; x < 4; x++) CHRBanks[x] = x; PRGBanks[0] = 0; PRGBanks[1] = 1; PRGBanks[2] = 0xFE; PRGBanks[3] = 0xFF; setprg2r(0x10, 0x6800, 0); Sync(); if(!info->battery) memset(WRAM, 0xFF, 0x800); }