static void init_pa7_dsm2()
{
EXTERNAL_RF_ON();
// configure_pins( PIN_EXTPPM_OUT, PIN_PERIPHERAL | PIN_PORTA | PIN_PER_3 | PIN_OS25 | PIN_PUSHPULL ) ;
// Timer8
setupPulsesDsm2(6) ;
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN ; // Enable portA clock
#if defined(REV3)
configure_pins( PIN_INTPPM_OUT, PIN_PERIPHERAL | PIN_PORTA | PIN_PER_1 | PIN_OS25 | PIN_PUSHPULL ) ;
#else
configure_pins( PIN_EXTPPM_OUT, PIN_PERIPHERAL | PIN_PORTA | PIN_PER_3 | PIN_OS25 | PIN_PUSHPULL ) ;
#endif
RCC->APB2ENR |= RCC_APB2ENR_TIM8EN ; // Enable clock
RCC->AHB1ENR |= RCC_AHB1ENR_DMA2EN ; // Enable DMA2 clock
TIM8->CR1 &= ~TIM_CR1_CEN ;
TIM8->ARR = 44000 ; // 22mS
TIM8->CCR2 = 40000 ; // Update time
TIM8->PSC = (PeripheralSpeeds.Peri2_frequency * PeripheralSpeeds.Timer_mult2) / 2000000 - 1 ; // 0.5uS from 30MHz
#if defined(REV3)
TIM8->CCER = TIM_CCER_CC1E | TIM_CCER_CC1P ;
#else
#ifdef PCB9XT
TIM8->CCER = TIM_CCER_CC1NE | TIM_CCER_CC1NP ;
#else
TIM8->CCER = TIM_CCER_CC1NE ;
#endif
#endif
TIM8->CR2 = TIM_CR2_OIS1 ; // O/P idle high
TIM8->BDTR = TIM_BDTR_MOE ; // Enable outputs
TIM8->CCR1 = dsm2Stream[0] ;
TIM8->CCMR1 = TIM_CCMR1_OC1M_2 ; // Force O/P low, hardware inverts it
TIM8->EGR = 1 ; // Restart
// TIM8->SR &= ~TIM_SR_UIF ; // Clear flag
// TIM8->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM8->DIER |= TIM_DIER_CC1DE ; // Enable DMA on CC1 match
TIM8->DCR = 13 ; // DMA to CC1
// TIM8->CR1 = TIM_CR1_OPM ; // Just run once
// Enable the DMA channel here, DMA2 stream 2, channel 7
DMA2_Stream2->CR &= ~DMA_SxCR_EN ; // Disable DMA
DMA2->LIFCR = DMA_LIFCR_CTCIF2 | DMA_LIFCR_CHTIF2 | DMA_LIFCR_CTEIF2 | DMA_LIFCR_CDMEIF2 | DMA_LIFCR_CFEIF2 ; // Write ones to clear bits
DMA2_Stream2->CR = DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_2 | DMA_SxCR_PL_0 | DMA_SxCR_MSIZE_0
| DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0 | DMA_SxCR_PFCTRL ;
DMA2_Stream2->PAR = CONVERT_PTR(&TIM8->DMAR);
DMA2_Stream2->M0AR = CONVERT_PTR(&dsm2Stream[1]);
// DMA2_Stream2->FCR = 0x05 ; //DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ;
// DMA2_Stream2->NDTR = 100 ;
DMA2_Stream2->CR |= DMA_SxCR_EN ; // Enable DMA
TIM8->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0 ; // Toggle CC1 o/p
TIM8->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM8->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
TIM8->CR1 |= TIM_CR1_CEN ;
NVIC_SetPriority( TIM8_CC_IRQn, 3 ) ; // Lower priority interrupt
NVIC_EnableIRQ(TIM8_CC_IRQn) ;
}
static void init_pa7_assan()
{
x9dSPortInit( 115200, SPORT_MODE_HARDWARE, 0, 0 ) ;
EXTERNAL_RF_ON();
setupPulsesDsm2(6) ;
configure_pins( PIN_EXTPPM_OUT, PIN_INPUT | PIN_PORTA ) ;
// configure_pins( PIN_EXTPPM_OUT, PIN_OUTPUT | PIN_PUSHPULL | PIN_OS25 | PIN_PORTA ) ;
// GPIO_SetBits(GPIOA, PIN_EXTPPM_OUT) ; // Set high
RCC->APB2ENR |= RCC_APB2ENR_TIM8EN ; // Enable clock
TIM8->CR1 &= ~TIM_CR1_CEN ;
TIM8->ARR = 22000 ; // 11mS
TIM8->CCR2 = 19000 ; // Update time
TIM8->CCR1 = 10000 ; // Tx back on time
TIM8->CCR3 = 1936*2 ; // Tx hold on until time
TIM8->PSC = (PeripheralSpeeds.Peri2_frequency * PeripheralSpeeds.Timer_mult2) / 2000000 - 1 ; // 0.5uS from 30MHz
#if defined(REV3)
TIM8->CCER = TIM_CCER_CC1E | TIM_CCER_CC1P ;
#else
TIM8->CCER = TIM_CCER_CC1NE ;
#endif
TIM8->EGR = 0 ; // Restart
TIM8->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM8->DIER |= TIM_DIER_CC2IE | TIM_DIER_CC1IE | TIM_DIER_CC3IE ; // Enable these interrupts
TIM8->DIER |= TIM_DIER_UIE ;
TIM8->CR1 |= TIM_CR1_CEN ;
NVIC_SetPriority( TIM8_CC_IRQn, 3 ) ; // Lower priority interrupt
NVIC_SetPriority( TIM8_UP_TIM13_IRQn, 3 ) ; // Lower priority interrupt
NVIC_EnableIRQ(TIM8_CC_IRQn) ;
NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn) ;
}
void setupPulses(unsigned int port)
{
heartbeat |= HEART_TIMER_PULSES ;
#ifdef REV9E
SuCount += 1 ;
// progress( 0xA000 + port + ( SuCount << 4 ) ) ;
// return ;
#endif
if ( port == 0 )
{
if ( s_current_protocol[0] != g_model.protocol )
{
switch( s_current_protocol[0] )
{ // stop existing protocol hardware
case PROTO_PPM:
disable_main_ppm() ;
break;
case PROTO_PXX:
disable_pxx(0) ;
break;
// case PROTO_DSM2:
// disable_ssc() ;
// break;
// case PROTO_PPM16 :
// disable_main_ppm() ;
// break ;
}
s_current_protocol[0] = g_model.protocol ;
switch(s_current_protocol[0])
{ // Start new protocol hardware here
case PROTO_PPM:
init_main_ppm() ;
break;
case PROTO_PXX:
init_pxx(0) ;
break;
case PROTO_OFF:
init_no_pulses( INTERNAL_MODULE ) ;
break;
// case PROTO_DSM2:
// init_main_ppm( 5000, 0 ) ; // Initial period 2.5 mS, output off
// init_ssc() ;
// break;
// case PROTO_PPM16 :
// init_main_ppm( 3000, 1 ) ; // Initial period 1.5 mS, output on
// break ;
}
}
// Set up output data here
switch(s_current_protocol[0])
{
case PROTO_PPM:
setupPulsesPpm(); // Don't enable interrupts through here
break;
case PROTO_PXX:
setupPulsesPXX(0);
break;
// case PROTO_DSM2:
//// sei() ; // Interrupts allowed here
// setupPulsesDsm2(6);
// break;
// case PROTO_PPM16 :
// setupPulsesPPM(); // Don't enable interrupts through here
//// // PPM16 pulses are set up automatically within the interrupts
//// break ;
}
}
else
{
if ( s_current_protocol[1] != g_model.xprotocol )
{
switch( s_current_protocol[1] )
{ // stop existing protocol hardware
case PROTO_PPM:
disable_ppm(EXTERNAL_MODULE) ;
break;
case PROTO_PXX:
disable_pxx(EXTERNAL_MODULE) ;
break;
case PROTO_DSM2:
disable_dsm2(EXTERNAL_MODULE) ;
break;
#ifdef ASSAN
case PROTO_ASSAN :
disable_assan(EXTERNAL_MODULE) ;
break;
#endif
// case PROTO_PPM16 :
// disable_main_ppm() ;
// break ;
}
s_current_protocol[1] = g_model.xprotocol ;
switch(s_current_protocol[1])
{ // Start new protocol hardware here
case PROTO_PPM:
setupPulsesPpmx() ;
init_ppm(EXTERNAL_MODULE) ;
break;
case PROTO_PXX:
init_pxx(EXTERNAL_MODULE) ;
break;
case PROTO_OFF:
init_no_pulses( EXTERNAL_MODULE ) ;
break;
case PROTO_DSM2:
init_dsm2(EXTERNAL_MODULE) ;
break;
#ifdef ASSAN
case PROTO_ASSAN :
init_assan(EXTERNAL_MODULE) ;
break;
#endif
// case PROTO_PPM16 :
// init_main_ppm( 3000, 1 ) ; // Initial period 1.5 mS, output on
// break ;
}
}
// Set up output data here
switch(s_current_protocol[1])
{
case PROTO_PPM:
setupPulsesPpmx(); // Don't enable interrupts through here
break;
case PROTO_PXX:
setupPulsesPXX(1);
break;
case PROTO_DSM2:
// sei() ; // Interrupts allowed here
setupPulsesDsm2(6);
break;
#ifdef ASSAN
case PROTO_ASSAN :
setupPulsesDsm2(g_model.xppmNCH) ;
break;
#endif
// case PROTO_PPM16 :
// setupPulsesPPM(); // Don't enable interrupts through here
//// // PPM16 pulses are set up automatically within the interrupts
//// break ;
}
}
}
