static void setup_gpmi_nand(void) { imx_iomux_v3_setup_multiple_pads(gpmi_pads, ARRAY_SIZE(gpmi_pads)); setup_gpmi_io_clk((3 << MXC_CCM_CSCDR1_BCH_PODF_OFFSET) | (3 << MXC_CCM_CSCDR1_GPMI_PODF_OFFSET)); }
static void cm_fx6_setup_gpmi_nand(void) { SETUP_IOMUX_PADS(nand_pads); /* Enable clock roots */ enable_usdhc_clk(1, 3); enable_usdhc_clk(1, 4); setup_gpmi_io_clk(MXC_CCM_CS2CDR_ENFC_CLK_PODF(0xf) | MXC_CCM_CS2CDR_ENFC_CLK_PRED(1) | MXC_CCM_CS2CDR_ENFC_CLK_SEL(0)); }
static void setup_gpmi_nand(void) { struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; /* config gpmi nand iomux */ imx_iomux_v3_setup_multiple_pads(gpmi_pads, ARRAY_SIZE(gpmi_pads)); setup_gpmi_io_clk((MXC_CCM_CS2CDR_QSPI2_CLK_PODF(0) | MXC_CCM_CS2CDR_QSPI2_CLK_PRED(3) | MXC_CCM_CS2CDR_QSPI2_CLK_SEL(3))); /* enable apbh clock gating */ setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); }
static void setup_gpmi_nand(void) { struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; /* config gpmi nand iomux */ SETUP_IOMUX_PADS(gpmi_pads); setup_gpmi_io_clk((MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) | MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) | MXC_CCM_CS2CDR_ENFC_CLK_SEL(3))); /* enable apbh clock gating */ setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); }