void do_setup_dpll(const struct dpll_regs *dpll_regs, const struct dpll_params *params) { u32 temp; if (!params) return; temp = readl(dpll_regs->cm_clksel_dpll); bypass_dpll(dpll_regs); /* Set M & N */ temp &= ~CM_CLKSEL_DPLL_M_MASK; temp |= (params->m << CM_CLKSEL_DPLL_M_SHIFT) & CM_CLKSEL_DPLL_M_MASK; temp &= ~CM_CLKSEL_DPLL_N_MASK; temp |= (params->n << CM_CLKSEL_DPLL_N_SHIFT) & CM_CLKSEL_DPLL_N_MASK; writel(temp, dpll_regs->cm_clksel_dpll); setup_post_dividers(dpll_regs, params); /* Wait till the DPLL locks */ do_lock_dpll(dpll_regs); wait_for_lock(dpll_regs); }
static void do_setup_dpll(u32 const base, const struct dpll_params *params, u8 lock, char *dpll) { u32 temp, M, N; struct dpll_regs *const dpll_regs = (struct dpll_regs *)base; if (!params) return; temp = readl(&dpll_regs->cm_clksel_dpll); if (check_for_lock(base)) { /* * The Dpll has already been locked by rom code using CH. * Check if M,N are matching with Ideal nominal opp values. * If matches, skip the rest otherwise relock. */ M = (temp & CM_CLKSEL_DPLL_M_MASK) >> CM_CLKSEL_DPLL_M_SHIFT; N = (temp & CM_CLKSEL_DPLL_N_MASK) >> CM_CLKSEL_DPLL_N_SHIFT; if ((M != (params->m)) || (N != (params->n))) { debug("\n %s Dpll locked, but not for ideal M = %d," "N = %d values, current values are M = %d," "N= %d" , dpll, params->m, params->n, M, N); } else { /* Dpll locked with ideal values for nominal opps. */ debug("\n %s Dpll already locked with ideal" "nominal opp values", dpll); bypass_dpll(base); goto setup_post_dividers; } } bypass_dpll(base); /* Set M & N */ temp &= ~CM_CLKSEL_DPLL_M_MASK; temp |= (params->m << CM_CLKSEL_DPLL_M_SHIFT) & CM_CLKSEL_DPLL_M_MASK; temp &= ~CM_CLKSEL_DPLL_N_MASK; temp |= (params->n << CM_CLKSEL_DPLL_N_SHIFT) & CM_CLKSEL_DPLL_N_MASK; writel(temp, &dpll_regs->cm_clksel_dpll); setup_post_dividers: setup_post_dividers(base, params); /* Lock */ if (lock) do_lock_dpll(base); /* Wait till the DPLL locks */ if (lock) wait_for_lock(base); }