static int msm_init_after_reset(struct ehci_ctrl *dev) { struct msm_ehci_priv *p = container_of(dev, struct msm_ehci_priv, ctrl); struct usb_ehci *ehci = p->ehci; /* select ULPI phy */ writel(PORT_PTS_ULPI, &ehci->portsc); setup_usb_phy(p); /* Enable sess_vld */ setbits_le32(&ehci->genconfig2, GEN2_SESS_VLD_CTRL_EN); /* Enable external vbus configuration in the LINK */ setbits_le32(&ehci->usbcmd, SESS_VLD_CTRL); /* USB_OTG_HS_AHB_BURST */ writel(0x0, &ehci->sbuscfg); /* USB_OTG_HS_AHB_MODE: HPROT_MODE */ /* Bus access related config. */ writel(0x08, &ehci->sbusmode); /* set mode to host controller */ writel(CM_HOST, &ehci->usbmode); return 0; }
/* * EHCI-initialization * Create the appropriate control structures to manage * a new EHCI host controller. */ int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr, struct ehci_hcor **hcor) { struct exynos_ehci *ctx = &exynos; #ifdef CONFIG_OF_CONTROL if (exynos_usb_parse_dt(gd->fdt_blob, ctx)) { debug("Unable to parse device tree for ehci-exynos\n"); return -ENODEV; } #else ctx->usb = (struct exynos_usb_phy *)samsung_get_base_usb_phy(); ctx->hcd = (struct ehci_hccr *)samsung_get_base_usb_ehci(); #endif #ifdef CONFIG_OF_CONTROL /* setup the Vbus gpio here */ if (dm_gpio_is_valid(&ctx->vbus_gpio)) dm_gpio_set_value(&ctx->vbus_gpio, 1); #endif setup_usb_phy(ctx->usb); board_usb_init(index, init); *hccr = ctx->hcd; *hcor = (struct ehci_hcor *)((uint32_t) *hccr + HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); debug("Exynos5-ehci: init hccr %x and hcor %x hc_length %d\n", (uint32_t)*hccr, (uint32_t)*hcor, (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); return 0; }