Esempio n. 1
0
void wtc_wr (int32 rg, int32 val)
{
int32 new_val = val;

val = val & 0xFF;

wtc_ram[rg] = val;                                      /* Save data in RAM */
switch(rg) {                                            /* register behaviors */

    case 10:                                            /* CSR A */
        val = val & WTC_CSRA_WR;
        new_val = wtc_csra = (wtc_csra & ~WTC_CSRA_WR) | val;
        break;

    case 11:                                            /* CSR B */
        val = val & WTC_CSRB_WR;
        new_val = wtc_csrb = (wtc_csrb & ~WTC_CSRB_WR) | val;
        break;

    case 12:                                            /* CSR C */
        break;

    case 13:                                            /* CSR D */
        val = val & WTC_CSRD_WR;
        new_val = wtc_csrd = (wtc_csrd & ~WTC_CSRD_WR) | val;
        break;
        }

if (rg < 14) {
    sim_debug(DBG_REG, &wtc_dev, "wtc_wr(rg=%d [%s], data=0x%X) ", rg, wtc_regs[rg], val);
    sim_debug_bits(DBG_REG, &wtc_dev, wtc_bitdefs[rg], (uint32)new_val, (uint32)new_val, TRUE);
    }
else
    sim_debug(DBG_REG, &wtc_dev, "wtc_wr(rg=%d [RAM], data=0x%X)\n", rg, val);
}
Esempio n. 2
0
t_stat mba_wrreg (int32 val, int32 pa, int32 lnt)
{
int32 mb, ofs, drv, rtype;
uint32 old_reg, old_sr;
t_stat r;
t_bool cs1dt;

mb = NEXUS_GETNEX (pa) - TR_MBA0;                       /* get MBA */
if ((pa & 3) || (lnt != L_LONG)) {                      /* unaligned or not lw? */
    sim_printf (">>MBA%d: invalid adapter write mask, pa = 0x%X, lnt = %d\r\n", mb, pa, lnt);
#if defined(VAX_780)
    sbi_set_errcnf ();                                  /* err confirmation */
#endif
    return SCPE_OK;
    }
if (mb >= MBA_NUM)                                      /* valid? */
    return SCPE_NXM;
rtype = MBA_RTYPE (pa);                                 /* get reg type */

old_sr = mba_sr[mb];

switch (rtype) {                                        /* case on type */

    case MBART_INT:                                     /* internal */
        ofs = MBA_INTOFS (pa);                          /* check range */
        sim_debug (MBA_DEB_RWR, &mba_dev[mb], "mba_wrreg(reg=%s write, val=0x%X)\n", mba_regnames[ofs], val);

        switch (ofs) {

        case MBACNF_OF:                                 /* CNF */
            old_reg = mba_cnf[mb];
            mba_cnf[mb] &= ~(val & MBACNF_W1C);
            sim_debug_bits(MBA_DEB_RWR, &mba_dev[mb], mba_reg_bits[ofs], old_reg, mba_cnf[mb], 1);
            break;

        case MBACR_OF:                                  /* CR */
            old_reg = mba_cr[mb];
            if (val & MBACR_INIT)                       /* init? */
                mba_reset (&mba_dev[mb]);               /* reset MBA */
            if ((val & MBACR_ABORT) &&
                (mba_sr[mb] & MBASR_DTBUSY)) {
                if (mbabort[mb])                        /* abort? */
                    mbabort[mb] ();
                mba_upd_sr (MBASR_DTABT, 0, mb);
                }
            if ((val & MBACR_MNT) &&
                (mba_sr[mb] & MBASR_DTBUSY)) {
                mba_upd_sr (MBASR_PGE, 0, mb);          /* mnt & xfer? */
                val = val & ~MBACR_MNT;
                }
            if ((val & MBACR_IE) == 0)
                mba_clr_int (mb);
            mba_cr[mb] = (mba_cr[mb] & ~MBACR_WR) |
                (val & MBACR_WR);
            sim_debug_bits(MBA_DEB_RWR, &mba_dev[mb], mba_reg_bits[ofs], old_reg, mba_cr[mb], 1);
            break;

        case MBASR_OF:                                  /* SR */
            mba_sr[mb] = mba_sr[mb] & ~(val & MBASR_W1C);
            break;

        case MBAVA_OF:                                  /* VA */
            old_reg = mba_va[mb];
            sim_debug_bits(MBA_DEB_RWR, &mba_dev[mb], mba_reg_bits[ofs], mba_va[mb], val, 1);
            if (mba_sr[mb] & MBASR_DTBUSY)              /* err if xfr */
                mba_upd_sr (MBASR_PGE, 0, mb);
            else mba_va[mb] = val & MBAVA_WR;
            sim_debug_bits(MBA_DEB_RWR, &mba_dev[mb], mba_reg_bits[ofs], old_reg, mba_va[mb], 1);
            break;

        case MBABC_OF:                                  /* BC */
            old_reg = mba_bc[mb];
            if (mba_sr[mb] & MBASR_DTBUSY)              /* err if xfr */
                mba_upd_sr (MBASR_PGE, 0, mb);
            else mba_bc[mb] = val & MBABC_WR;
            sim_debug_bits(MBA_DEB_RWR, &mba_dev[mb], mba_reg_bits[ofs], old_reg, mba_bc[mb], 1);
            break;

        case MBADR_OF:                                  /* DR */
            old_reg = mba_dr[mb];
            mba_dr[mb] = (mba_dr[mb] & ~MBADR_WR) |
                (val & MBADR_WR);
            sim_debug_bits(MBA_DEB_RWR, &mba_dev[mb], mba_reg_bits[ofs], old_reg, mba_dr[mb], 1);
            break;

        default:
            return SCPE_NXM;
            }
        break;

    case MBART_EXT:                                     /* external */
        if (!mbregW[mb])                                /* device there? */
            return SCPE_NXM;
        drv = MBA_EXTDRV (pa);                          /* get dev num */
        ofs = MBA_EXTOFS (pa);                          /* get reg offs */
        sim_debug (MBA_DEB_RWR, &mba_dev[mb], "mba_wrreg(drv=%d ext reg=%d write, val=0x%X)\n", drv, ofs, val);
        cs1dt = (ofs == MBA_CS1) && (val & CSR_GO) &&   /* starting xfr? */
           ((val & MBA_CS1_WR) >= MBA_CS1_DT);
        if (cs1dt && (mba_sr[mb] & MBASR_DTBUSY)) {     /* xfr while busy? */
            mba_upd_sr (MBASR_PGE, 0, mb);              /* prog error */
            break;
            }
        r = mbregW[mb] (val & WMASK, ofs, drv);         /* write dev reg */
        if (r == MBE_NXD)                               /* nx drive? */
            mba_upd_sr (MBASR_NFD, 0, mb);
        else if (r == MBE_NXR)                          /* nx reg? */
            return SCPE_NXM;
        if (cs1dt && (r == SCPE_OK))                    /* did dt start? */     
            mba_sr[mb] = (mba_sr[mb] | MBASR_DTBUSY) & ~MBASR_W1C;
        break; 

    case MBART_MAP:                                     /* map */
        ofs = MBA_INTOFS (pa);
        mba_map[mb][ofs] = val & MBAMAP_WR;
        sim_debug (MBA_DEB_MWR, &mba_dev[mb], "mba_wrreg(map %d write, val=0x%X)\n", ofs, val);
        break;

    default:
        return SCPE_NXM;
        }

if (old_sr != mba_sr[mb])
    sim_debug_bits(MBA_DEB_RWR, &mba_dev[mb], mba_sr_bits, old_sr, mba_sr[mb], 1);

return SCPE_OK;
}
Esempio n. 3
0
int32 wtc_rd (int32 rg)
{
int32 val = 0;
time_t curr;
struct timespec now;
static int mdays[12] = {31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
struct tm *ctm = NULL;

if (rg < 10) {                                          /* time reg? */
    sim_rtcn_get_time (&now, TMR_CLK);
    curr = now.tv_sec;                                  /* get curr time */
    if (curr == (time_t) -1)                            /* error? */
        return 0;
    ctm = localtime (&curr);                            /* decompose */
    if (ctm == NULL)                                    /* error? */
        return 0;
    if ((wtc_mode == WTC_MODE_VMS) &&
        ((ctm->tm_year % 4) == 0)) {                    /* Leap Year? */
        if (ctm->tm_mon > 1) {                          /* Past February? */
            ++ctm->tm_mday;                             /* Adjust for Leap Day */
            if (ctm->tm_mday > mdays[ctm->tm_mon]) {    /* wrap to last day of prior month */
                ++ctm->tm_mon;
                ctm->tm_mday = 1;
                }
            }
        else
            if ((ctm->tm_mon == 1) &&                   /* February 29th? */
                (ctm->tm_mday == 29)) {
                ctm->tm_mon = 2;                        /* Is March 1 in 1982 */
                ctm->tm_mday = 1;
                }
        }
    }

val = wtc_ram[rg];                                      /* start with RAM data */

if (rg < 14) {
    switch(rg) {

        case 0:                                         /* seconds */
            val = ctm->tm_sec;
            break;

        case 2:                                         /* minutes */
            val = ctm->tm_min;
            break;

        case 4:                                         /* hours */
            val = ctm->tm_hour;
            break;

        case 6:                                         /* day of week */
            val = ctm->tm_wday;
            break;

        case 7:                                         /* day of month */
            val = ctm->tm_mday;
            break;

        case 8:                                         /* month */
            val = ctm->tm_mon + 1;
            break;

        case 9:                                         /* year */
            if (wtc_mode == WTC_MODE_VMS)
                val = 82;                               /* always 1982 for VMS */
            else
                val = (int32)(ctm->tm_year % 100);
            break;

        case 10:                                        /* CSR A */
            val = wtc_csra;
            break;

        case 11:                                        /* CSR B */
            val = wtc_csrb;
            break;

        case 12:                                        /* CSR C */
            val = wtc_csrc;
            break;

        case 13:                                        /* CSR D */
            val = wtc_csrd & WTC_CSRD_RD;
            wtc_set_valid ();
            break;
            }
    sim_debug(DBG_REG, &wtc_dev, "wtc_rd(rg=%d [%s], data=0x%X) ", rg, wtc_regs[rg], val);
    sim_debug_bits(DBG_REG, &wtc_dev, wtc_bitdefs[rg], (uint32)val, (uint32)val, TRUE);
    }
else
    sim_debug(DBG_REG, &wtc_dev, "wtc_rd(rg=%d [RAM], data=0x%X)\n", rg, val);

return val;
}
Esempio n. 4
0
t_stat mba_rdreg (int32 *val, int32 pa, int32 lnt)
{
int32 mb, ofs, drv, rtype;
uint32 t;
t_stat r;

mb = NEXUS_GETNEX (pa) - TR_MBA0;                       /* get MBA */
if ((pa & 3) || (lnt != L_LONG)) {                      /* unaligned or not lw? */
    sim_printf (">>MBA%d: invalid adapter read mask, pa = 0x%X, lnt = %d\r\n", mb, pa, lnt);
#if defined(VAX_780)
    sbi_set_errcnf ();                                  /* err confirmation */
#endif
    return SCPE_OK;
    }
if (mb >= MBA_NUM)                                      /* valid? */
    return SCPE_NXM;
rtype = MBA_RTYPE (pa);                                 /* get reg type */

switch (rtype) {                                        /* case on type */

    case MBART_INT:                                     /* internal */
        ofs = MBA_INTOFS (pa);                          /* check range */
        switch (ofs) {

        case MBACNF_OF:                                 /* CNF */
            *val = (mba_cnf[mb] & MBACNF_RD) | MBACNF_CODE;
            break;

        case MBACR_OF:                                  /* CR */
            *val = mba_cr[mb] & MBACR_RD;
            break;

        case MBASR_OF:                                  /* SR */
            *val = mba_sr[mb] & MBASR_RD;
            break;

        case MBAVA_OF:                                  /* VA */
            *val = mba_va[mb] & MBAVA_RD;
            break;

        case MBABC_OF:                                  /* BC */
            t = mba_bc[mb] & MBABC_WR;
            *val = (t << MBABC_V_MBC) | t;
             break;

        case MBADR_OF:                                  /* DR */
            *val = mba_dr[mb] & MBADR_RD;
             break;

        case MBASMR_OF:                                 /* SMR */
            *val = mba_smr[mb] & MBASMR_RD;
            break;

        case MBACMD_OF:                                 /* CMD */
            *val = 0;
             break;

        default:
            return SCPE_NXM;
            }
        sim_debug (MBA_DEB_RRD, &mba_dev[mb], "mba_rdreg(Reg=%s, val=0x%X)\n", mba_regnames[ofs], *val);
        sim_debug_bits(MBA_DEB_RRD, &mba_dev[mb], mba_reg_bits[ofs], *val, *val, 1);
        break;

    case MBART_EXT:                                     /* external */
        if (!mbregR[mb])                                /* device there? */
            return SCPE_NXM;
        drv = MBA_EXTDRV (pa);                          /* get dev num */
        ofs = MBA_EXTOFS (pa);                          /* get reg offs */
        r = mbregR[mb] (val, ofs, drv);                 /* call device */
        if (r == MBE_NXD)                               /* nx drive? */
            mba_upd_sr (MBASR_NFD, 0, mb);
        else if (r == MBE_NXR)                          /* nx reg? */
            return SCPE_NXM;
        *val |= (mba_sr[mb] & ~WMASK);                  /* upper 16b from SR */
        sim_debug (MBA_DEB_RRD, &mba_dev[mb], "mba_rdreg(drv %d ext reg=%d, val=0x%X)\n", drv, ofs, *val);
        break; 

    case MBART_MAP:                                     /* map */
        ofs = MBA_INTOFS (pa);
        *val = mba_map[mb][ofs] & MBAMAP_RD;
        sim_debug (MBA_DEB_MRD, &mba_dev[mb], "mba_rdreg(map %d read, val=0x%X)\n", ofs, *val);
        break;

    default:
        return SCPE_NXM;
        }

return SCPE_OK;
}