static void uart_16550_io_do_cycle(void* uart_16550){
uart_16550_t* uart = (uart_16550_t *)uart_16550;
reg_16550_t* reg = uart->reg;
if (reg->ier & 0x2) { /* THREI enabled */
//printf("In %s, THR interrupt\n", __FUNCTION__);
reg->iir = (reg->iir & 0xf0) | 0x2;
reg->lsr |= 0x60;
}
if (reg->ier & 0x1) { /* RDAI enabled */
struct timeval tv;
unsigned char buf;
tv.tv_sec = 0;
tv.tv_usec = 0;
if(skyeye_uart_read(-1, &buf, 1, &tv, NULL) > 0)
{
//printf("SKYEYE:get input is %c\n",buf);
reg->rbr = buf;
reg->lsr |= 0x1;
reg->iir = (reg->iir & 0xf0) | 0x4;
skyeye_config_t* config = get_current_config();
config->mach->mach_intr_signal(uart->irq, High_level);
}
}
}
static void
std8250_io_do_cycle (void * state)
{
const int core_id = 0; /* currently, we only send uart interrupt to cpu0 */
e500_core_t * core = get_boot_core();
mpc8641d_io_t *io = &mpc8641d_io;
std_16550_uart_t *uart = &io->uart[0];
/*
if(!(core->msr & 0x8000))
return;
*/
if (uart->iir & 0x1) {
if (uart->ier & 0x2) { /* THREI enabled */
//printf("In %s, THR interrupt\n", __FUNCTION__);
uart->iir = (uart->iir & 0xf0) | 0x2;
uart->lsr |= 0x60;
}
if (uart->ier & 0x1) { /* RDAI enabled */
struct timeval tv;
unsigned char c;
tv.tv_sec = 0;
tv.tv_usec = 0;
if (skyeye_uart_read (-1, &c, 1, &tv, NULL) > 0) {
uart->rbr = (int) c;
//printf("SKYEYE: io_do_cycle set ffiir or 04, now %x\n",pxa250_io.ffiir);
uart->lsr |= 0x01; //Data ready
uart->iir = (uart->iir & 0xf0) | 0x4;
}
}
}
if ((!(io->mpic.iivpr[UART_IRQ] & 0x80000000) && (core->msr & 0x8000)
&& !(core->ipr & 1 << UART_IRQ))) {
//if(!(io->mpic.iivpr[UART_IRQ] & 0x80000000)){
if ((!(uart->iir & 0x1)) && (uart->ier & 0x3)
) {
//printf ("In %s,uart int triggered. ier=0x%x\n", __FUNCTION__, uart->ier);
core->ipr |= (1 << UART_IRQ);
io->mpic.iivpr[UART_IRQ] |= 0x40000000; /* set activity bit in vpr */
io->pic_percpu.iack[core_id] =
(io->pic_percpu.
iack[core_id] & 0xFFFF0000) | (io->mpic.
ipivpr
[UART_IRQ] &
0xFFFF);
skyeye_config_t *config = get_current_config();
if (!strcmp(config->os->os_name, "linux")) {
io->pic_percpu.iack[core_id] = 0x2a;
}else if (!strcmp(config->os->os_name, "vxworks")) {
io->pic_percpu.iack[core_id] = 0x26;
}
//printf("In %s, ack=0x%x\n", __FUNCTION__, io->pic_percpu.iack[core_id]);
core->ipi_flag = 1; /* we need to inform the core that npc is changed to exception vector */
ppc_exception (core, PPC_EXC_EXT_INT, 0, 0);
}
}
}
void
ep7312_io_do_cycle (ARMul_State * state)
{
int t;
for (t = 0; t < 2; t++) {
if (io.tcd[t] == 0) {
if (io.syscon & (t ? TC2M : TC1M)) {
io.tcd[t] = io.tcd_reload[t];
}
else {
io.tcd[t] = 0xffff;
}
io.intsr |= (t ? TC2OI : TC1OI);
ep7312_update_int (state);
}
else {
io.tcd[t]--;
}
}
if (!(io.intsr & URXINT)) {
/* 2007-01-18 modified by Anthony Lee : for new uart device frame */
struct timeval tv;
unsigned char buf;
tv.tv_sec = 0;
tv.tv_usec = 0;
if(skyeye_uart_read(-1, &buf, 1, &tv, NULL) > 0)
{
io.uartdr = (int) buf;
io.sysflg &= ~URXFE;
io.intsr |= URXINT;
ep7312_update_int (state);
}
} //if (!(io.intsr & URXINT))
// ywc 2004-04-01 for touch screen interrupt
{
if (!(io.intsr & io.ts_int)) { //if now has no ts interrupt,then query
unsigned int* Pen_buffer = get_pen_buffer();
/* If Pen_buffer is registered. */
if(Pen_buffer != NULL){
if (Pen_buffer[6] == 1) { //should trigger a interrupt
*(io.ts_buffer + 0) = Pen_buffer[0];
*(io.ts_buffer + 1) = Pen_buffer[1];
*(io.ts_buffer + 4) = Pen_buffer[4];
*(io.ts_buffer + 6) = Pen_buffer[6];
//set EINT2 bit to trigger a interrupt,ts driver will clear it
io.intsr |= io.ts_int;
Pen_buffer[6] = 0;
}
}
}
}
}
/*s3c4510b io_do_cycle */
void
s3c4510b_io_do_cycle (ARMul_State * state)
{
/*Timer */
if (ENABLE_TIMER0) {
io.tcnt0--;
if (io.tcnt0 < 0) {
io.tcnt0 = io.tdata0;
s3c4510b_set_interrupt (INT_TIMER0);
s3c4510b_update_int (state);
return;
}
}
if (ENABLE_TIMER1) {
if (--io.tcnt1 < 0) {
io.tcnt1 = io.tdata1;
s3c4510b_set_interrupt (INT_TIMER1);
s3c4510b_update_int (state);
}
}
/*UART*/
{
/* 2007-01-18 modified by Anthony Lee : for new uart device frame */
struct timeval tv;
unsigned char buf;
tv.tv_sec = 0;
tv.tv_usec = 0;
if(skyeye_uart_read(-1, &buf, 1, &tv, NULL) > 0)
{
//ctrl_c support,replace by ctrl_a
if (buf == 1) buf = 3;
io.urxbuf0 = io.urxbuf1 = (int) buf;
io.ustat0 |= UART_LSR_DR;
io.ustat1 |= UART_LSR_DR;
if (!(io.intpnd & (1 << INT_UARTRX0))
|| !(io.intpnd & (1 << INT_UARTRX1))) {
if ((io.ucon0 & 0x3) == 0x1) {
s3c4510b_set_interrupt (INT_UARTRX0);
s3c4510b_update_int (state);
return;
}
if ((io.ucon1 & 0x3) == 0x1) {
s3c4510b_set_interrupt (INT_UARTRX1);
s3c4510b_update_int (state);
return;
}
}
}
}
s3c4510b_update_int (state);
}
/*at91rm92 io_do_cycle*/
static void
at91rm92_io_do_cycle (generic_arch_t *state)
{
if (io.st.pimr != 0) {
if (io.st.piv_dc == 0) {
io.st.sr |= AT91RM92_ST_PITS;
if (io.st.imr & AT91RM92_ST_PITS) {
io.ipr |= AT91RM92_ID_SYS;
}
io.st.piv_dc = io.st.pimr;
} else {
io.st.crtr++;
io.st.piv_dc--;
}
}
if (1) {
/* 2007-01-18 modified by Anthony Lee : for new uart device frame */
struct timeval tv;
unsigned char buf;
tv.tv_sec = 0;
tv.tv_usec = 0;
if(skyeye_uart_read(-1, &buf, 1, &tv, NULL) > 0)
{
int i = 0;
for(;i < UART_NUM; i++){
if( (((io.uart[i].cr & 0x30) >> 4)) == 0x1 ) /* If RX is enabled */
{
if(io.uart[i].imr & AT91RM92_US_RXRDY)
{
io.uart[i].rhr = (int) buf;
/* Receiver Ready
* */
io.uart[i].csr |= AT91RM92_US_RXRDY;
/* pending usart0 interrupt
* */
io.ipr |= AT91RM92_ID_US(i);
}
}
}
if(io.dbgu.cr & 0x10) /* If RXEN is set */
{
/* at the same time we think DBGU is also waiting to receiving */
io.dbgu.rhr = (int) buf;
io.dbgu.sr |= 0x1; /* set TXRDY bit */
}
}
} /* if (rcr > 0 && ... */
/* s3c2440 io_do_cycle */
static void
s3c2440_io_do_cycle (ARMul_State * mstate)
{
extern ARMul_State *state;
io.tc_prescale--;
if (io.tc_prescale < 0) {
io.tc_prescale = TC_DIVISOR;
if ((io.timer.tcon & 0x100000) != 0) {
io.timer.tcnt[4]--;
if (io.timer.tcnt[4] < 0) {
io.timer.tcnt[4] = io.timer.tcntb[4];
/*timer 4 hasn't tcmp */
//io.timer.tcmp[4] = io.timer.tcmpb[4];
io.timer.tcnto[4] = io.timer.tcntb[4];
io.srcpnd |= INT_TIMER4;
s3c2440_update_int (state);
return;
}
}
if (((io.uart0.utrstat & 0x1) == 0x0)
&& ((io.uart0.ucon & 0x3) == 0x1)) {
/* 2007-01-18 modified by Anthony Lee : for new uart device frame */
struct timeval tv;
unsigned char buf;
tv.tv_sec = 0;
tv.tv_usec = 0;
if(skyeye_uart_read(-1, &buf, 1, &tv, NULL) > 0)
{
io.uart0.urxh = (int) buf;
/* Receiver Ready
* */
io.uart0.utrstat |= (0x1);
io.uart0.ufstat |= (0x1);
/* pending usart0 interrupt
* */
s3c2440_set_subsrcint (UART_INT_RXD <<
(0 * 3));
//io.srcpnd |= INT_UART0;
s3c2440_update_int (state);
return;
}
}
//s3c2440_update_int (state);
} /* if (io.tc_prescale < 0) */
}
static void
gs32eb1_io_do_cycle (void * state)
{
MIPS_State* mstate = get_current_core();
#if 1
if(!(mstate->cp0[Cause] & (1 << Cause_IP4))){
/* UART receive interrupt enable */
int uart_int_enable = ((mstate->cp0[SR] & (1 << SR_IM4)) >> SR_IM4) & (mstate->cp0[SR] & (1 << SR_IEC)); // UART interrupt enable
struct timeval tv;
unsigned char c;
tv.tv_sec = 0;
tv.tv_usec = 0;
if(skyeye_uart_read(-1, &c, 1, &tv, NULL) > 0)
{
io.uart[0].thr = (int) c;
//printf("SKYEYE: io_do_cycle set intcause = %x\n",io.uart[0].intcause);
io.uart[0].lsr |= 0x01; //Data ready
//printf("In %s, uart receive int,uart_int_enable=0x%x, SR=0x%x\n", __FUNCTION__, uart_int_enable, mstate->cp0[SR]);
io.uart[0].iir |= 0x4; //Rx idle
} /* if(skyeye_uart_read(-1, &c, 1, &tv, NULL) > 0) */
// UART interrupt enable
if(uart_int_enable){
if ((io.uart[0].ier & 0x1)
&& (io.uart[0].iir & 0x4)) {
io.uart[0].iir &= ~0x1;
/* Set uart interrupt bit in IP section of Cause register */
mstate->cp0[Cause] |= 1 << Cause_IP4;
/* Set ExcCode to zero in Cause register */
process_exception(mstate, EXC_Int, common_vector);
}
#if 1
if (io.uart[0].ier & 0x2) {
io.uart[0].iir |= 0x2;
io.uart[0].iir &= ~0x1;
io.uart[0].lsr |= 0x60;
//printf("THR interrupt\n");
/* Set uart interrupt bit in IP section of Cause register */
mstate->cp0[Cause] |= 1 << Cause_IP4;
/* Set ExcCode to zero in Cause register */
process_exception(mstate, EXC_Int, common_vector);
}
#endif
}
}
void ps7500_uart_cycle(void *state)
{
/* 2007-01-18 modified by Anthony Lee : for new uart device frame */
struct timeval tv;
unsigned char buf, c;
tv.tv_sec = 0;
tv.tv_usec = 0;
if(skyeye_uart_read(-1, &buf, 1, &tv, NULL) > 0)
{
printf("read something %02x\n", buf);
c = ps7500_getcode(buf);
ps7500_kb_queue(state, c);
ps7500_kb_queue(state, 0xf0);
ps7500_kb_queue(state, c);
}
}
/* s3c2410x io_do_cycle */
static void
s3c2410x_io_do_cycle (ARMul_State * state)
{
int i;
if ((io.timer.tcon & 0x100000) != 0) {
io.timer.tcnt[4]--;
if (io.timer.tcnt[4] < 0) {
io.timer.tcnt[4] = io.timer.tcntb[4];
/*timer 4 hasn't tcmp */
//io.timer.tcmp[4] = io.timer.tcmpb[4];
io.timer.tcnto[4] = io.timer.tcntb[4];
io.srcpnd |= INT_TIMER4;
s3c2410x_update_int (state);
return;
}
}
for (i = 0; i < 3; i++) {
if (((io.uart[i].utrstat & 0x1) == 0x0) && ((io.uart[i].ucon & 0x3) == 0x1)) {
struct timeval tv;
unsigned char buf;
tv.tv_sec = 0;
tv.tv_usec = 0;
if (skyeye_uart_read(i, &buf, 1, &tv, NULL) > 0) {
/* convert ctrl+c to ctrl+a. */
if (buf == 1) buf = 3;
io.uart[i].urxh = buf;
/* Receiver Ready
* */
io.uart[i].utrstat |= (0x1);
io.uart[i].ufstat |= (0x1); /* 2007-02-09 by Anthony Lee : for 1 bytes */
/* pending usart0 interrupt
* */
s3c2410x_set_subsrcint (UART_INT_RXD << (i * 3));
//io.srcpnd |= INT_UART0;
s3c2410x_update_int (state);
}
}
}
//s3c2410x_update_int (state);
}
void
lh79520_io_do_cycle (ARMul_State * state)
{
int t;
io.tc_prescale--;
if (io.tc_prescale < 0) {
io.tc_prescale = TC_DIVISOR;
for (t = 0; t < 2 - 1; t++) { //only timer0 be supported now
if (io.tcd[t] == 0) {
if (io.tcd_ctrl[t] & TIMER_CONTROL_MODE) { //Periodic mode
io.tcd[t] = io.tcd_reload[t];
}
else { //Free-Running mode
io.tcd[t] = 0xffff;
}
io.intsr |= (t ? TC2OI : TC1OI);
lh79520_update_int (state);
}
else {
io.tcd[t]--;
}
}
if (!(io.intsr & UART1INT)) {
/* 2007-01-18 modified by Anthony Lee : for new uart device frame */
struct timeval tv;
unsigned char buf;
tv.tv_sec = 0;
tv.tv_usec = 0;
if(skyeye_uart_read(-1, &buf, 1, &tv, NULL) > 0)
{
io.uartdr = (int) buf;
io.uartfr &= ~AMBA_UARTFR_RXFE;
io.uartmis |= AMBA_UART_IS_RX;
UART2VIC (state);
}
} //if (!(io.intsr & UART1INT))
}
}
void
ep9312_io_do_cycle (ARMul_State * state)
{
int i;
/* We must implement TC1, TC2 and TC4 */
for (i = 0; i < 2; i++) {
if (io.tc[i].value == 0) {
if (io.tc[i].ctl & TC_CTL_MODE)
io.tc[i].value = io.tc[i].load;
else
io.tc[i].value = io.tc[i].mod_value;
io.intsr[0] |= TCOI[i];
ep9312_update_int (state);
}
else {
io.tc[i].value--;
}
}
io.tc[3].load++;
if (!(io.intsr[0] & (UART_RXINTR[iConsole]))
&& io.uart[iConsole].dr == 0) {
/* 2007-01-18 modified by Anthony Lee : for new uart device frame */
struct timeval tv;
unsigned char buf;
tv.tv_sec = 0;
tv.tv_usec = 0;
if(skyeye_uart_read(-1, &buf, 1, &tv, NULL) > 0)
{
io.uart[iConsole].dr = (int) buf;
io.intsr[0] |= UART_RXINTR[iConsole];
io.intmr[0] |= UART_RXINTR[iConsole];
io.intsr[1] |= INT_UART[iConsole];
io.intmr[1] |= INT_UART[iConsole];
io.uart[iConsole].iir |= UART_IIR_RIS;
io.uart[iConsole].fr &= ~UART_FR_RXFE;
ep9312_update_int (state);
}
} //if (!(io.intsr & URXINT))
}
/*lpc2210 io_do_cycle*/
void lpc2210_io_do_cycle(ARMul_State *state)
{
int t;
io.timer[0].pc++;
io.timer[1].pc++;
//add by linxz
//printf("SKYEYE:Timer0 PC:%d, TC:%d\n", io.timer[0].pc, io.timer[0].tc);
//printf(",MR0:%d,PR:%d,RISR:%d,IER:%d,ISLR:%d,ISR:%d\n", io.timer[0].mr0, io.timer[0].pr, io.vic.RawIntr, io.vic.IntEnable, io.vic.IntSelect, io.vic.IRQStatus);
if (!(io.vic.RawIntr & IRQ_TC0)) { //no timer0 int yet
if (io.timer[0].pc >= io.timer[0].pr+1) {
io.timer[0].tc++;
io.timer[0].pc = 0;
if(io.timer[0].tc >= io.timer[0].mr0/1000) /*Skyeye's clock is far more slow than the real Ocs. I have to make the clock interrupt come quicker*/{
// if(io.timer[0].tc == 20){
io.vic.RawIntr |= IRQ_TC0;
io.timer[0].tc = 0;
//add by linxz
//printf("\r\nI\r\n");
}
lpc2210_update_int(state);
}
}
if(io.timer[0].pc == 0){
if (!(io.vic.RawIntr & IRQ_UART0)) {
/* 2007-01-18 modified by Anthony Lee : for new uart device frame */
struct timeval tv;
unsigned char buf;
tv.tv_sec = 0;
tv.tv_usec = 0;
if(skyeye_uart_read(-1, &buf, 1, &tv, NULL) > 0)
{
//printf("SKYEYE:get input is %c\n",buf);
io.uart[0].rbr = buf;
io.uart[0].lsr |= 0x1;
io.vic.RawIntr |= IRQ_UART0;
lpc2210_update_int(state);
}
}/* if (rcr > 0 && ...*/
}
}
void
cs89712_io_do_cycle (ARMul_State * state)
{
int t;
for (t = 0; t < 2; t++) {
if (io.tcd[t] == 0) {
if (io.syscon & (t ? TC2M : TC1M)) {
io.tcd[t] = io.tcd_reload[t];
}
else {
io.tcd[t] = 0xffff;
}
io.intsr |= (t ? TC2OI : TC1OI);
cs89712_update_int (state);
}
else {
io.tcd[t]--;
}
}
if (!(io.intsr & URXINT)) {
/* 2007-01-18 modified by Anthony Lee : for new uart device frame */
struct timeval tv;
unsigned char buf;
tv.tv_sec = 0;
tv.tv_usec = 0;
if(skyeye_uart_read(-1, &buf, 1, &tv, NULL) > 0)
{
io.uartdr = (int) buf;
io.sysflg &= ~URXFE;
io.intsr |= URXINT;
cs89712_update_int (state);
}
}
}
/*lpc io_do_cycle*/
void
lpc_io_do_cycle (ARMul_State * state)
{
int t;
io.timer[0].pc++;
io.timer[1].pc++;
if (!(io.vic.risr & IRQ_TC0)) {
if (io.timer[0].pc >= io.timer[0].pr + 1) {
// if (io.timer[0].pc >= 5000+1) {
io.timer[0].tc++;
io.timer[0].pc = 0;
if (io.timer[0].tc == io.timer[0].mr0) {
// if(io.timer[0].tc == 20){
io.vic.risr |= IRQ_TC0;
io.timer[0].tc = 0;
}
lpc_update_int (state);
}
}
if (io.timer[0].pc == 0) {
if (!(io.vic.risr & IRQ_UART0)) {
/* 2007-01-18 modified by Anthony Lee : for new uart device frame */
struct timeval tv;
unsigned char buf;
tv.tv_sec = 0;
tv.tv_usec = 0;
if(skyeye_uart_read(-1, &buf, 1, &tv, NULL) > 0)
{
//printf("SKYEYE:get input is %c\n",buf);
io.uart[0].rbr = buf;
io.uart[0].lsr |= 0x1;
io.vic.risr |= IRQ_UART0;
lpc_update_int (state);
}
} /* if (rcr > 0 && ... */
}
}
/*ns9750 io_do_cycle*/
static void
ns9750_io_do_cycle (void *state)
{
#if 1
if (io.st.pimr != 0) {
if (io.st.piv_dc == 0) {
io.st.sr |= AT91RM92_ST_PITS;
if (io.st.imr & AT91RM92_ST_PITS) {
io.ipr |= AT91RM92_ID_SYS;
}
io.st.piv_dc = io.st.pimr;
} else {
io.st.piv_dc--;
}
}
if ((io.uart0.imr & AT91RM92_US_RXRDY)) {
/* 2007-01-18 modified by Anthony Lee : for new uart device frame */
struct timeval tv;
unsigned char buf;
tv.tv_sec = 0;
tv.tv_usec = 0;
if(skyeye_uart_read(-1, &buf, 1, &tv, NULL) > 0)
{
io.uart0.rhr = (int) buf;
/* Receiver Ready
* */
io.uart0.csr |= AT91RM92_US_RXRDY;
/* pending usart0 interrupt
* */
io.ipr |= AT91RM92_ID_US0;
}
} /* if (rcr > 0 && ... */
ns9750_update_int (state);
#endif
}
static void
omap5912_io_do_cycle (void *state)
{
struct timeval tv;
unsigned char buf;
int i = 0;
tv.tv_sec = 0;
tv.tv_usec = 0;
/** mpu timer interrupt update*/
#if 1
if ((omap5912_io.timer.mpu_cntl_timer[0] & 0x23) == 0x23) //bit5 enable clock; bit1 auto or oneshot;bit0 start decrem
{
//omap5912_io.timer.mpu_read_timer[0] &= 0x0000000f;
omap5912_io.timer.mpu_read_timer[0]--;
//printf("omap5912_io.timer.mpu_load_timer[0] = %x\n",omap5912_io.timer.mpu_load_timer[0]);
//printf("omap5912_io.timer.mpu_read_timer[0] = %x\n",omap5912_io.timer.mpu_read_timer[0]);
if (omap5912_io.timer.mpu_read_timer[0] == 0)
{
//printf("omap5912_io.timer.mpu_read_timer[0] = %x\n",omap5912_io.timer.mpu_read_timer[0]);
omap5912_io.timer.mpu_read_timer[0] = (omap5912_io.timer.mpu_load_timer[0]);
//printf("omap5912_io.timer.mpu_read_timer[0] = %x\n",omap5912_io.timer.mpu_read_timer[0]);
omap5912_io.ic.mpu_l1_itr |= (1 << 26);
/*shoulod add some code to determin which priority the interrpt is!1*/
#if 1
for (i=31; i>=0; i--)
{
if (omap5912_io.ic.mpu_l1_itr & (1 << i))
break;
}
if (i <=31)
{
omap5912_io.ic.mpu_l1_sir_irq_code = i;
//omap5912_io.ic.mpu_l1_itr &= ~(1 << i);
}
#endif
omap5912_update_int(state);
return;
}
//omap5912_update_int(state);
}
#endif
/*uart interrupt update*/
#if 0
if ((omap5912_io.uart.ier & 0xf) == 0x5)
{
//printf("uart_lsr%x\n", omap5912_io.uart.lsr);
//printf("uart_ier%x\n", omap5912_io.uart.ier);
if (skyeye_uart_read(-1, &buf, 1, &tv, NULL) > 0)
{
//if (buf == 1) buf = 3;
//printf("buf%x\n", buf);
omap5912_io.uart.rhr = buf;
omap5912_io.uart.lsr |= (0x1); //bit 0: no data in receive bugger
//omap5912_io.uart.iir |= RHR_INT;
}
//omap5912_io.uart.iir &= 0x0 ;
if ((omap5912_io.uart.ier & 0x1) && (omap5912_io.uart.lsr & 0x1))
{
omap5912_io.uart.iir = RHR_INT;
omap5912_io.ic.mpu_l2_itr |= (1<<14);
#if 1
for (i=31; i>=0; i--)
{
if (omap5912_io.ic.mpu_l2_itr & (1 << i))
break;
}
if (i <=31)
{
omap5912_io.ic.mpu_l2_sir_irq = i;
//printf("i = %d\n", i);
}
#endif
}
omap5912_update_int(state);
return;
}
#endif
omap5912_update_int(state);
}
static void
pxa250_io_do_cycle (ARMul_State * state)
{
/*RTC*/ if (++pxa250_io.rt_scale >= RT_SCALE) {
pxa250_io.rt_scale = 0;
if (pxa250_io.rt_count++ == (pxa250_io.rttr & 0xffff)) {
pxa250_io.rt_count = 0;
if (pxa250_io.rcnr++ == pxa250_io.rtar) {
if (pxa250_io.rtsr & 0x4) {
pxa250_io.rtsr |= 0x1;
};
}
if (pxa250_io.rtsr & 0x8) {
pxa250_io.rtsr |= 0x2;
}
}
if ((pxa250_io.rtsr & 0x1) && (pxa250_io.rtsr & 0x4))
pxa250_io.icpr |= RTC_ALARM_IRQ;
if ((pxa250_io.rtsr & 0x2) && (pxa250_io.rtsr & 0x8))
pxa250_io.icpr |= RTC_HZ_IRQ;
}
/*OS timer */
if (++pxa250_io.os_scale >= OS_SCALE) {
u32 mask = 0;
u32 count;
pxa250_io.os_scale = 0;
count = pxa250_io.oscr++;
if (count == pxa250_io.osmr0)
mask = 1;
if (count == pxa250_io.osmr1)
mask |= 0x2;
if (count == pxa250_io.osmr2)
mask |= 0x4;
if (count == pxa250_io.osmr3) {
mask |= 0x8;
if (pxa250_io.ower & 1) {
state->NresetSig = LOW;
printf ("************SKYEYE: WatchDog reset!!!!!!!**************\n");
}
}
pxa250_io.ossr |= mask;
mask = pxa250_io.oier & pxa250_io.ossr;
pxa250_io.icpr |= (mask << OS_IRQ_SHF);
}
/*FF UART */
//pxa250_io.utsr0 = 1; /*always TFS, no others*/
//pxa250_io.utsr1 = 0x4; /*TNF*/
if (++pxa250_io.ff_scale >= FF_SCALE) {
pxa250_io.ff_scale = 0;
if (!(FFUART_IRQ & pxa250_io.icpr)) {
int int_enable = pxa250_io.ffmcr & 0x18; // UART interrupt enable
/* 2007-01-18 modified by Anthony Lee : for new uart device frame */
struct timeval tv;
unsigned char c;
tv.tv_sec = 0;
tv.tv_usec = 0;
//pxa250_io.utsr1 |= 0x2; //RNE
//pxa250_io.utsr0 |= 0x4; //Rx idle
//added by ksh,2004-4-25,get uart data and set the interrupt
if(skyeye_uart_read(-1, &c, 1, &tv, NULL) > 0)
{
pxa250_io.ffrbr = (int) c;
pxa250_io.ffiir |= 0x4; //Rx idle
//printf("SKYEYE: io_do_cycle set ffiir or 04, now %x\n",pxa250_io.ffiir);
pxa250_io.fflsr |= 0x01; //Data ready
}
if ((pxa250_io.ffier & 0x1)
&& (pxa250_io.ffiir & 0x4)) {
if (int_enable)
pxa250_io.icpr |= FFUART_IRQ;
pxa250_io.ffiir &= ~0x1;
}
/*chy 2004-07-21 from luzhetao: produce a IRQ and ox2 should clean by OS driver */
if (pxa250_io.ffier & 0x2) {
if (int_enable)
pxa250_io.icpr |= FFUART_IRQ;
pxa250_io.ffiir |= 0x2;
pxa250_io.ffiir &= ~0x1;
pxa250_io.fflsr |= 0x60;
}
}
//ywc,2004-11-30,check and get the mouse event
#ifndef NO_LCD
if (!(pxa250_io.icpr & pxa250_io.ts_int)) { //if now has no ts interrupt,then query
if (Pen_buffer[6] == 1) { //should trigger a interrupt
*(pxa250_io.ts_buffer + 0) = Pen_buffer[0];
*(pxa250_io.ts_buffer + 1) = Pen_buffer[1];
*(pxa250_io.ts_buffer + 4) = Pen_buffer[4];
*(pxa250_io.ts_buffer + 6) = Pen_buffer[6];
//set EINT2 bit to trigger a interrupt,ts driver will clear it
pxa250_io.icpr |= pxa250_io.ts_int;
Pen_buffer[6] = 0;
}
}
#endif
//ywc,2004-11-30,check and get the mouse event,end
}
pxa250_update_int (state);
/*reset interrupt pin status */
//refresh_irq (state);
};
