int sl_Start(const void* pIfHdl, char* pDevName, const P_INIT_CALLBACK pInitCallBack)
{
int pObjIdx = MAX_CONCURRENT_ACTIONS;
InitComplete_t AsyncRsp;
/* callback init */
_SlDrvDriverCBInit();
/* open the interface: usually SPI or UART */
if (NULL == pIfHdl)
{
g_pCB->FD = sl_IfOpen(pDevName, 0);
}
else
{
g_pCB->FD = (_SlFd_t)pIfHdl;
}
/* Use Obj to issue the command, if not available try later */
pObjIdx = _SlDrvWaitForPoolObj(START_STOP_ID, SL_MAX_SOCKETS);
if (MAX_CONCURRENT_ACTIONS == pObjIdx)
{
return SL_POOL_IS_EMPTY;
}
OSI_RET_OK_CHECK(sl_LockObjLock(&g_pCB->ProtectionLockObj, SL_OS_WAIT_FOREVER));
g_pCB->ObjPool[pObjIdx].pRespArgs = (UINT8 *)&AsyncRsp;
OSI_RET_OK_CHECK(sl_LockObjUnlock(&g_pCB->ProtectionLockObj));
if( g_pCB->FD >= 0)
{
sl_DeviceDisable();
sl_IfRegIntHdlr((SL_P_EVENT_HANDLER)_SlDrvRxIrqHandler, NULL);
sl_DeviceEnable();
if (NULL != pInitCallBack)
{
g_pCB->pInitCallback = pInitCallBack;
}
else
{
OSI_RET_OK_CHECK(sl_SyncObjWait(&g_pCB->ObjPool[pObjIdx].SyncObj, SL_OS_WAIT_FOREVER));
/*release Pool Object*/
_SlDrvReleasePoolObj(g_pCB->FunctionParams.AsyncExt.ActionIndex);
return GetStartResponseConvert(AsyncRsp.Status);
}
}
return (int)g_pCB->FD;
}
/*!
\brief Test the spi communication
\param[in] none
\return upon successful, the function shall return 0.
Otherwise, -1 shall be returned
\warning
*/
static int TestSpi()
{
const _SlSyncPattern_t H2NCnysPattern = H2N_CNYS_PATTERN;
_SlFd_t FD = 0;
unsigned int irqCheck = 0;
unsigned char pBuf[8] = {'\0'};
unsigned char SyncCnt = 0;
unsigned char ShiftIdx = 0;
/* Start the state machine */
SetTestStage(TEST_STAGE_SPI_TEST_BEGIN);
/* Initialize the Spi interface */
FD = sl_IfOpen(0, 0);
SetTestStage(TEST_STAGE_SPI_OPEN_PASSED);
/* Register IRQ handler */
sl_IfRegIntHdlr((P_EVENT_HANDLER)DiagIrqHandler, 0);
/*Make Sure that the device is turned off */
sl_DeviceDisable();
SetTestStage(TEST_STAGE_DISABLE_PASSED);
/* Save IRQ counter before activating the Device */
irqCheck = g_irqCounter;
/* Turn on the device */
sl_DeviceEnable();
SetTestStage(TEST_STAGE_ENABLE_PASSED);
/* Wait until we get an increment on IRQ value */
while( irqCheck == g_irqCounter )
{
}
SetTestStage(TEST_STAGE_SPI_IRQ_PASSED);
/* Generate the sync pattern for getting the response */
sl_IfWrite(FD, (unsigned char *)&H2NCnysPattern, SYNC_PATTERN_LEN);
SetTestStage(TEST_STAGE_SPI_WRITE_PASSED);
/* Read 4 bytes from the Spi */
sl_IfRead(FD, &pBuf[0], 4);
/* Sync on read pattern */
while ( ! N2H_SYNC_PATTERN_MATCH(pBuf, TxSeqNum))
{
/* Read next 4 bytes to Low 4 bytes of buffer */
if(0 == (SyncCnt % SYNC_PATTERN_LEN))
{
sl_IfRead(FD, &pBuf[4], 4);
}
/* Shift Buffer Up for checking if the sync is shifted */
for(ShiftIdx = 0; ShiftIdx < 7; ShiftIdx++)
{
pBuf[ShiftIdx] = pBuf[ShiftIdx+1];
}
pBuf[7] = 0;
SyncCnt++;
}
/*Sync pattern found. If needed, complete number of read bytes to multiple
* of 4 (protocol align) */
SyncCnt %= SYNC_PATTERN_LEN;
if(SyncCnt > 0)
{
*(UINT32 *)&pBuf[0] = *(UINT32 *)&pBuf[4];
sl_IfRead(FD, &pBuf[SYNC_PATTERN_LEN - SyncCnt], SyncCnt);
}
else
{
sl_IfRead(FD, &pBuf[0], 4);
}
/* Scan for possible double pattern */
while( N2H_SYNC_PATTERN_MATCH(pBuf, TxSeqNum))
{
sl_IfRead(FD, &pBuf[0], SYNC_PATTERN_LEN);
}
/* Read the Resp Specific header (4 more bytes) */
sl_IfRead(FD, &pBuf[SYNC_PATTERN_LEN], 4);
SetTestStage(TEST_STAGE_SPI_READ_PASSED);
/* Check the init complete message opcode */
if(SL_OPCODE_DEVICE_INITCOMPLETE != (*(unsigned short*)(pBuf)))
{
UartWrite((unsigned char *)"Error in Spi Testing\r\n");
return -1; /* failed to read init complete */
}
SetTestStage(TEST_STAGE_INIT_COMPLETE_READ_PASSED);
SetTestStage(TEST_STAGE_SPI_TEST_COMPLETE);
return SUCCESS;
}