//extern void enter_pasr_dpd_config(unsigned char segment_rank0, unsigned char segment_rank1);
//extern void exit_pasr_dpd_config(void);
static int enter_pasrdpd(void)
{
int error = 0;
u32 sr = 0, dpd = 0;
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
slp_crit2("[%s]\n",__FUNCTION__);
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
/* Setup SPM wakeup event firstly */
spm_set_wakeup_src_check();
/* Start PASR/DPD SW operations */
error = pasr_enter(&sr, &dpd);
if (error) {
slp_crit2("[PM_WAKEUP] Failed to enter PASR!\n");
} else {
/* Call SPM/DPD control API */
slp_crit2("MR17[0x%x] DPD[0x%x]\n",sr,dpd);
/* Should configure SR */
if (mtkpasr_enable_sr == 0) {
sr = 0x0;
slp_crit2("[%s][%d] No configuration on SR\n",__FUNCTION__,__LINE__);
}
/* Configure PASR */
//enter_pasr_dpd_config((sr & 0xFF), (sr >> 0x8));
//if (mrw_error) {
// printk(KERN_ERR "[%s][%d] PM: Failed to configure MRW PASR [%d]!\n",__FUNCTION__,__LINE__,mrw_error);
//}
}
slp_crit2("Bye [%s]\n",__FUNCTION__);
return error;
}
static void slp_suspend_ops_finish(void)
{
/* legacy log */
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
slp_crit2("Chip_pm_finish\n");
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
}
static void leave_pasrdpd(void)
{
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
slp_crit2("[%s]\n",__FUNCTION__);
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
/* Disable PASR */
//exit_pasr_dpd_config();
slp_crit2("[%d]\n",__LINE__);
/* End PASR/DPD SW operations */
pasr_exit();
slp_crit2("Bye [%s]\n",__FUNCTION__);
}
static int slp_suspend_ops_enter(suspend_state_t state)
{
/* legacy log */
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
slp_crit2("Chip_pm_enter\n");
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
if (slp_dump_gpio)
gpio_dump_regs();
if (slp_dump_regs)
slp_dump_pm_regs();
if (!spm_cpusys_can_power_down()) {
slp_error("CANNOT SLEEP DUE TO CPU1/2/3 PON\n");
return -EPERM;
}
if (slp_infra_pdn && !slp_cpu_pdn) {
slp_error("CANNOT SLEEP DUE TO INFRA PDN BUT CPU PON\n");
return -EPERM;
}
#if SLP_SLEEP_DPIDLE_EN
if (slp_ck26m_on)
slp_wake_reason = spm_go_to_sleep_dpidle(slp_cpu_pdn, 0);
else
#endif
slp_wake_reason = spm_go_to_sleep(slp_cpu_pdn, slp_infra_pdn);
return 0;
}
static int slp_suspend_ops_prepare(void)
{
/* legacy log */
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
slp_crit2("Chip_pm_prepare\n");
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
if (slp_chk_golden)
mt_power_gs_dump_suspend();
return 0;
}
static int slp_suspend_ops_prepare(void)
{
/* legacy log */
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
slp_crit2("Chip_pm_prepare\n");
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
if (slp_chk_golden)
Golden_Setting_Compare_for_Suspend();
return 0;
}
static void slp_suspend_ops_end(void)
{
/* legacy log */
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
slp_notice("Chip_pm_end\n");
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
if (1 == slp_auto_suspend_resume)
{
slp_crit2("slp_auto_suspend_resume_cnt = %d \n", slp_auto_suspend_resume_cnt);
slp_auto_suspend_resume_cnt++;
if (10 < slp_auto_suspend_resume_cnt)
{
slp_crit2("do spm_usb_resume\n");
wake_lock(&spm_suspend_lock);
slp_auto_suspend_resume = 0;
slp_auto_suspend_resume_cnt =0;
}
}
}
static int slp_suspend_ops_prepare(void)
{
/* legacy log */
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
slp_crit2("Chip_pm_prepare\n");
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
//FIXME: for K2 fpga early porting
#if 1
if (slp_chk_golden)
mt_power_gs_dump_suspend();
#endif
return 0;
}
static int slp_auto_suspend_resume_thread_handler(void *unused)
{
do
{
wait_event_interruptible(slp_auto_suspend_resume_timer_waiter, slp_auto_suspend_resume_timer_flag != 0);
slp_auto_suspend_resume_timer_flag = 0;
charging_suspend_enable();
slp_crit2("slp_auto_suspend_resume_thread_handler charging_suspend_enable\n");
} while (!kthread_should_stop());
return 0;
}
static void leave_pasrdpd(void)
{
int mrw_error = 0;
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
slp_crit2("[%s]\n",__FUNCTION__);
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
/* Disable PASR */
mrw_error = configure_mrw_pasr(0x0, 0x0);
/* End PASR/DPD SW operations */
pasr_exit();
}
static enum hrtimer_restart slp_auto_suspend_resume_timer_func(struct hrtimer *timer)
{
slp_crit2("do slp_auto_suspend_resume_timer_func\n");
slp_auto_suspend_resume = 0;
slp_auto_suspend_resume_cnt =0;
#if 0
charging_suspend_enable();
#else
slp_auto_suspend_resume_timer_flag = 1;
wake_up_interruptible(&slp_auto_suspend_resume_timer_waiter);
#endif
return HRTIMER_NORESTART;
}
void slp_start_auto_suspend_resume_timer(u32 sec)
{
ktime_t ktime;
slp_auto_suspend_resume = 1;
charging_suspend_disable();
slp_time = sec;
slp_crit2("slp_start_auto_suspend_resume_timer init = %d\n", slp_time);
ktime = ktime_set(slp_time, 0);
hrtimer_init(&slp_auto_suspend_resume_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
slp_auto_suspend_resume_hrtimer.function = slp_auto_suspend_resume_timer_func;
hrtimer_start(&slp_auto_suspend_resume_hrtimer,ktime,HRTIMER_MODE_REL);
}
static int slp_suspend_ops_enter(suspend_state_t state)
{
#ifdef CONFIG_MTKPASR
/* PASR SW operations */
if (enter_pasrdpd())
goto pending_wakeup;
#endif
/* legacy log */
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
slp_crit2("Chip_pm_enter\n");
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
if (slp_dump_gpio)
gpio_dump_regs();
if (slp_dump_regs)
slp_dump_pm_regs();
if (!spm_cpusys0_can_power_down()) {
slp_error("CANNOT SLEEP DUE TO CPU1/2/3 PON\n");
return -EPERM;
}
if (slp_infra_pdn && !slp_cpu_pdn) {
slp_error("CANNOT SLEEP DUE TO INFRA PDN BUT CPU PON\n");
return -EPERM;
}
#if SLP_SLEEP_DPIDLE_EN
if (slp_ck26m_on)
slp_wake_reason = spm_go_to_sleep_dpidle(slp_cpu_pdn, slp_pwrlevel, slp_pwake_time);
else
#endif
slp_wake_reason = spm_go_to_sleep(slp_cpu_pdn, slp_infra_pdn, slp_pwake_time);
#ifdef CONFIG_MTKPASR
/* PASR SW operations */
leave_pasrdpd();
pending_wakeup:
#endif
return 0;
}
static int slp_suspend_ops_enter(suspend_state_t state)
{
int ret = 0;
#ifdef CONFIG_MTK_TC1_FM_AT_SUSPEND
int fm_radio_is_playing = 0;
if ( ConditionEnterSuspend() == true )
fm_radio_is_playing = 0;
else
fm_radio_is_playing = 1;
#endif /* CONFIG_MTK_TC1_FM_AT_SUSPEND */
#ifdef CONFIG_MTKPASR
/* PASR SW operations */
enter_pasrdpd();
#endif
/* legacy log */
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
slp_crit2("Chip_pm_enter\n");
slp_notice("@@@@@@@@@@@@@@@@@@@@\n");
//FIXME: for K2 bring up
if (slp_dump_gpio)
gpio_dump_regs();
#if 0
if (slp_dump_regs)
slp_dump_pm_regs();
#endif
if (slp_check_mtcmos_pll)
slp_check_pm_mtcmos_pll();
if (!spm_cpusys0_can_power_down()) {
slp_error("CANNOT SLEEP DUE TO CPU1~x PON, SPM_PWR_STATUS = 0x%x, SPM_PWR_STATUS_2ND = 0x%x\n",
slp_read(SPM_PWR_STATUS), slp_read(SPM_PWR_STATUS_2ND));
//return -EPERM;
ret = -EPERM;
goto LEAVE_SLEEP;
}
if (is_infra_pdn(slp_spm_flags) && !is_cpu_pdn(slp_spm_flags)) {
slp_error("CANNOT SLEEP DUE TO INFRA PDN BUT CPU PON\n");
//return -EPERM;
ret = -EPERM;
goto LEAVE_SLEEP;
}
/* only for test */
#if 0
slp_pasr_en(1, 0x0);
slp_dpd_en(1);
#endif
#if SLP_SLEEP_DPIDLE_EN
#ifdef CONFIG_MTK_TC1_FM_AT_SUSPEND
if (slp_ck26m_on | fm_radio_is_playing)
#else
if (slp_ck26m_on)
#endif
slp_wake_reason = spm_go_to_sleep_dpidle(slp_spm_deepidle_flags, slp_spm_data);
else
#endif
slp_wake_reason = spm_go_to_sleep(slp_spm_flags, slp_spm_data);
LEAVE_SLEEP:
#ifdef CONFIG_MTKPASR
/* PASR SW operations */
leave_pasrdpd();
#endif
#ifdef CONFIG_MTK_SYSTRACKER
systracker_enable();
#endif
return ret;
}
