int board_init(void)
{
unsigned int tmp;
DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_A8388_V1) || defined(CONFIG_S9) || defined(CONFIG_A8388_V2) || defined(CONFIG_A9)
//内部上拉串口
tmp = readl(GPA1PUD);
tmp &= ~(0xf);
tmp |= 0xa;
writel(tmp,GPA1PUD);
#ifndef CONFIG_AUTO_SDFUSE
power_init_off();
#endif
#endif /* CONFIG_A8388_V1 CONFIG_S9 CONFIG_A8388_V2*/
resume_system = check_resume_key();
sdfuse_system = check_sdfuse_key();
#ifdef CONFIG_DRIVER_SMC911X
smc9115_pre_init();
#endif
#ifdef CONFIG_DRIVER_DM9000
dm9000_pre_init();
#endif
gd->bd->bi_arch_number = MACH_TYPE;
gd->bd->bi_boot_params = (PHYS_SDRAM_1+0x100);
return 0;
}
int board_init(void)
{
smc9115_pre_init();
gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
return 0;
}
int board_eth_init(bd_t *bis)
{
#ifdef CONFIG_SMC911X
if (smc9115_pre_init())
return -1;
return smc911x_initialize(0, CONFIG_SMC911X_BASE);
#endif
return 0;
}
int board_init(void)
{
smc9115_pre_init();
gd->bd->bi_arch_number = MACH_TYPE_SMDKC100;
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
return 0;
}
int board_init(void)
{
#ifdef CONFIG_SMC911X
smc9115_pre_init();
#endif
if(((PRO_ID & 0x300) >> 8) == 2)
gd->bd->bi_arch_number = MACH_TYPE_C210;
else
int board_init(void)
{
gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
smc9115_pre_init();
gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
return 0;
}
int board_init(void)
{
u8 read_vol_arm;
u8 read_vol_int;
u8 read_vol_g3d;
//u8 read_vol_mif;
u8 buck1_ctrl;
u8 buck2_ctrl;
u8 buck3_ctrl;
//u8 buck4_ctrl;
u8 ldo14_ctrl;
char bl1_version[9] = {0};
#if 0
IIC0_ERead(0xcc, 0x19, &read_vol_arm);
IIC0_ERead(0xcc, 0x22, &read_vol_int);
IIC0_ERead(0xcc, 0x2B, &read_vol_g3d);
//IIC0_ERead(0xcc, 0x2D, &read_vol_mif);
IIC0_ERead(0xcc, 0x18, &buck1_ctrl);
IIC0_ERead(0xcc, 0x21, &buck2_ctrl);
IIC0_ERead(0xcc, 0x2A, &buck3_ctrl);
//IIC0_ERead(0xcc, 0x2C, &buck4_ctrl);
IIC0_ERead(0xcc, 0x48, &ldo14_ctrl);
printf("vol_arm: %X\n", read_vol_arm);
printf("vol_int: %X\n", read_vol_int);
printf("vol_g3d: %X\n", read_vol_g3d);
//printf("vol_mif: %X\n", read_vol_mif);
printf("buck1_ctrl: %X\n", buck1_ctrl);
printf("buck2_ctrl: %X\n", buck2_ctrl);
printf("buck3_ctrl: %X\n", buck3_ctrl);
//printf("buck4_ctrl: %X\n", buck4_ctrl);
printf("ldo14_ctrl: %X\n", ldo14_ctrl);
#endif
/* display BL1 version */
#ifdef CONFIG_TRUSTZONE
printf("BL1 version: N/A (TrustZone Enabled BSP)\n");
#else
strncpy(&bl1_version[0], (char *)0x02022fc8, 8);
printf("BL1 version: %s\n", &bl1_version[0]);
#endif
#ifdef CONFIG_SMC911X
smc9115_pre_init();
#endif
#ifdef CONFIG_SMDKC220
gd->bd->bi_arch_number = MACH_TYPE_C220;
#else
if(((PRO_ID & 0x300) >> 8) == 2)
gd->bd->bi_arch_number = MACH_TYPE_C210;
else
int board_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
smc9115_pre_init();
gd->bd->bi_arch_number = MACH_TYPE;
gd->bd->bi_boot_params = (PHYS_SDRAM_1+0x100);
#if 0
icache_enable();
dcache_enable();
#endif
return 0;
}
int board_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_DRIVER_SMC911X
smc9115_pre_init();
#endif
#ifdef CONFIG_DRIVER_DM9000
dm9000_pre_init();
#endif
gd->bd->bi_arch_number = MACH_TYPE;
gd->bd->bi_boot_params = (PHYS_SDRAM_1+0x100);
return 0;
}
int board_init(void)
{
u8 read_vol_arm;
u8 read_vol_int;
u8 read_vol_g3d;
u8 read_vol_mif;
u8 read_vol_mem;
u8 read_vol_apll;
u8 pmic_id;
char bl1_version[9] = {0};
/* display BL1 version */
#ifdef CONFIG_TRUSTZONE
printf("\nTrustZone Enabled BSP");
strncpy(&bl1_version[0], (char *)0x0204f810, 8);
#else
strncpy(&bl1_version[0], (char *)0x02022fc8, 8);
#endif
printf("\nBL1 version: %s\n", &bl1_version[0]);
#if defined(CONFIG_PM) && !defined(CONFIG_S5M8767)
/* read ID */
IIC0_ERead(MAX8997_ADDR, MAX8997_ID, &pmic_id);
if (pmic_id == 0x77) {
/* MAX8997 */
printf("PMIC: MAX8997\n");
pmic = SMDK5250_REGULATOR_MAX8997;
IIC0_ERead(MAX8997_ADDR, MAX8997_BUCK1TV_DVS, &read_vol_arm);
IIC0_ERead(MAX8997_ADDR, MAX8997_BUCK2TV_DVS, &read_vol_int);
IIC0_ERead(MAX8997_ADDR, MAX8997_BUCK3TV_DVS, &read_vol_g3d);
IIC0_ERead(MAX8997_ADDR, MAX8997_BUCK4TV_DVS, &read_vol_mif);
IIC0_ERead(MAX8997_ADDR, MAX8997_LDO10CTRL, &read_vol_apll);
printf("ARM: %dmV\t", ((unsigned int)read_vol_arm * 25) + 650);
printf("INT: %dmV\t", ((unsigned int)read_vol_int * 25) + 650);
printf("G3D: %dmV\n", ((unsigned int)read_vol_g3d * 50) + 750);
printf("MIF: %dmV\t", ((unsigned int)read_vol_mif * 25) + 650);
printf("APLL: %dmV\n", ((unsigned int)(read_vol_apll & 0x3F)
* 50) + 800);
} else if (pmic_id >= 0x0 && pmic_id <= 0x5) {
/* S5M8767 */
printf("PMIC: S5M8767\n");
pmic = SMDK5250_REGULATOR_S5M8767;
} else {
/* MAX77686 */
printf("PMIC: MAX77686\n");
pmic = SMDK5250_REGULATOR_MAX77686;
IIC0_ERead(MAX77686_ADDR, MAX77686_BUCK2TV_DVS1, &read_vol_arm);
IIC0_ERead(MAX77686_ADDR, MAX77686_BUCK3TV_DVS1, &read_vol_int);
IIC0_ERead(MAX77686_ADDR, MAX77686_BUCK4TV_DVS1, &read_vol_g3d);
IIC0_ERead(MAX77686_ADDR, MAX77686_BUCK1OUT, &read_vol_mif);
IIC0_ERead(MAX77686_ADDR, MAX77686_BUCK5OUT, &read_vol_mem);
printf("ARM: %dmV\t", ((unsigned int)(read_vol_arm >> 1) * 25) + 600);
printf("INT: %dmV\t", ((unsigned int)(read_vol_int >> 1) * 25) + 600);
printf("G3D: %dmV\n", ((unsigned int)(read_vol_g3d >> 1)* 25) + 600);
printf("MIF: %dmV\t", ((unsigned int)(read_vol_mif & 0x3F) * 50) + 750);
printf("MEM: %dmV\n", ((unsigned int)(read_vol_mem & 0x3F) * 50) + 750);
}
#endif
#ifdef CONFIG_SMC911X
smc9115_pre_init();
#endif
#ifdef CONFIG_CPU_EXYNOS5250_EVT1
*(unsigned int *)0x10050234 = 0;
#endif
gd->bd->bi_arch_number = MACH_TYPE;
gd->bd->bi_boot_params = (PHYS_SDRAM_1+0x100);
OmPin = INF_REG3_REG;
printf("\nChecking Boot Mode ...");
if (OmPin == BOOT_ONENAND) {
printf(" OneNand\n");
} else if (OmPin == BOOT_NAND) {
printf(" NAND\n");
} else if (OmPin == BOOT_MMCSD) {
printf(" SDMMC\n");
} else if (OmPin == BOOT_EMMC) {
printf(" EMMC4.3\n");
} else if (OmPin == BOOT_EMMC_4_4) {
printf(" EMMC4.41\n");
} else {
printf(" Please check OM_pin\n");
}
return 0;
}
int board_init(void)
{
u8 read_vol_arm;
u8 read_vol_int;
u8 read_vol_g3d;
u8 read_vol_mif;
u8 read_vol_ldo10;
u8 pmic_id;
char bl1_version[9] = {0};
/* display BL1 version */
#ifdef CONFIG_TRUSTZONE
printf("\nBL1 version: N/A (TrustZone Enabled BSP)\n");
#else
strncpy(&bl1_version[0], (char *)0x02022fc8, 8);
printf("\nBL1 version: %s\n", &bl1_version[0]);
#endif
#if defined(CONFIG_PM) && !defined(CONFIG_S5M8767)
/* read ID */
IIC0_ERead(MAX8997_ADDR, MAX8997_ID, &pmic_id);
if (pmic_id == 0x77) {
IIC0_ERead(MAX8997_ADDR, MAX8997_BUCK1TV_DVS, &read_vol_arm);
IIC0_ERead(MAX8997_ADDR, MAX8997_BUCK2TV_DVS, &read_vol_int);
IIC0_ERead(MAX8997_ADDR, MAX8997_BUCK3TV_DVS, &read_vol_g3d);
IIC0_ERead(MAX8997_ADDR, MAX8997_BUCK4TV_DVS, &read_vol_mif);
IIC0_ERead(MAX8997_ADDR, MAX8997_LDO10CTRL, &read_vol_ldo10);
printf("ARM: %dmV\t", ((unsigned int)read_vol_arm * 25) + 650);
printf("INT: %dmV\t", ((unsigned int)read_vol_int * 25) + 650);
printf("G3D: %dmV\t", ((unsigned int)read_vol_g3d * 50) + 750);
printf("MIF: %dmV\n", ((unsigned int)read_vol_mif * 25) + 650);
printf("LDO10: %dmV\n", ((unsigned int)(read_vol_ldo10 & 0x3F)
* 50) + 800);
} else {
}
#endif
#ifdef CONFIG_SMC911X
smc9115_pre_init();
#endif
gd->bd->bi_arch_number = MACH_TYPE;
gd->bd->bi_boot_params = (PHYS_SDRAM_1+0x100);
OmPin = INF_REG3_REG;
printf("\nChecking Boot Mode ...");
if (OmPin == BOOT_ONENAND) {
printf(" OneNand\n");
} else if (OmPin == BOOT_NAND) {
printf(" NAND\n");
} else if (OmPin == BOOT_MMCSD) {
printf(" SDMMC\n");
} else if (OmPin == BOOT_EMMC) {
printf(" EMMC4.3\n");
} else if (OmPin == BOOT_EMMC_4_4) {
printf(" EMMC4.41\n");
} else if (OmPin == BOOT_USB) {
printf(" USB\n");
} else {
printf(" Please check OM_pin\n");
}
return 0;
}
