/*
* Initialize clock frequencies and start both clocks running.
*/
void
initclocks(void)
{
int i;
softclock_si = softintr_establish(IPL_SOFTCLOCK, softclock, NULL);
if (softclock_si == NULL)
panic("initclocks: unable to register softclock intr");
ticks = INT_MAX - (15 * 60 * hz);
/*
* Set divisors to 1 (normal case) and let the machine-specific
* code do its bit.
*/
psdiv = pscnt = 1;
cpu_initclocks();
/*
* Compute profhz/stathz, and fix profhz if needed.
*/
i = stathz ? stathz : hz;
if (profhz == 0)
profhz = i;
psratio = profhz / i;
/* For very large HZ, ensure that division by 0 does not occur later */
if (tickadj == 0)
tickadj = 1;
inittimecounter();
}
/*
* softintr_init:
*
* Initialize the software interrupt system.
*/
void
softintr_init(void)
{
#if 0
static const char *softintr_names[] = SI_QUEUENAMES;
#endif
struct soft_intrq *siq;
int i;
for (i = 0; i < SI_NQUEUES; i++) {
siq = &soft_intrq[i];
TAILQ_INIT(&siq->siq_list);
#if 0
evcnt_attach_dynamic(&siq->siq_evcnt, EVCNT_TYPE_INTR,
NULL, "soft", softintr_names[i]);
#endif
siq->siq_si = i;
}
/* XXX Establish legacy software interrupt handlers. */
softnet_intrhand = softintr_establish(IPL_SOFTNET,
(void (*)(void *))netintr, NULL);
assert(softnet_intrhand != NULL);
}
void
netisr_init(void)
{
netisr_intr = softintr_establish(IPL_SOFTNET, netintr, NULL);
if (netisr_intr == NULL)
panic("can't establish softnet handler");
}
void
imxuartattach(struct device *parent, struct device *self, void *args)
{
struct armv7_attach_args *aa = args;
struct imxuart_softc *sc = (struct imxuart_softc *) self;
sc->sc_irq = arm_intr_establish(aa->aa_dev->irq[0], IPL_TTY,
imxuart_intr, sc, sc->sc_dev.dv_xname);
sc->sc_iot = aa->aa_iot;
if (bus_space_map(sc->sc_iot, aa->aa_dev->mem[0].addr,
aa->aa_dev->mem[0].size, 0, &sc->sc_ioh))
panic("imxuartattach: bus_space_map failed!");
if (aa->aa_dev->mem[0].addr == imxuartconsaddr)
printf(" console");
timeout_set(&sc->sc_diag_tmo, imxuart_diag, sc);
timeout_set(&sc->sc_dtr_tmo, imxuart_raisedtr, sc);
sc->sc_si = softintr_establish(IPL_TTY, imxuart_softint, sc);
if(sc->sc_si == NULL)
panic("%s: can't establish soft interrupt.",
sc->sc_dev.dv_xname);
printf("\n");
}
void
vsaudio_attach(struct device *parent, struct device *self, void *aux)
{
struct vsbus_attach_args *va = aux;
struct vsaudio_softc *sc = (struct vsaudio_softc *)self;
if (bus_space_map(va->va_iot, va->va_paddr, AM7930_DREG_SIZE << 2, 0,
&sc->sc_bh) != 0) {
printf(": can't map registers\n");
return;
}
sc->sc_bt = va->va_iot;
/*
* Set up glue for MI code early; we use some of it here.
*/
sc->sc_am7930.sc_glue = &vsaudio_glue;
am7930_init(&sc->sc_am7930, AUDIOAMD_POLL_MODE);
scb_vecalloc(va->va_cvec, vsaudio_hwintr, sc, SCB_ISTACK,
&sc->sc_intrcnt);
sc->sc_cvec = va->va_cvec;
evcount_attach(&sc->sc_intrcnt, self->dv_xname, &sc->sc_cvec);
sc->sc_swintr = softintr_establish(IPL_SOFT, &vsaudio_swintr, sc);
printf("\n");
audio_attach_mi(&vsaudio_hw_if, sc, &sc->sc_am7930.sc_dev);
}
void
sxiuartattach(struct device *parent, struct device *self, void *args)
{
struct armv7_attach_args *aa = args;
struct sxiuart_softc *sc = (struct sxiuart_softc *) self;
bus_space_tag_t iot;
bus_space_handle_t ioh;
int s;
sc->sc_iot = iot = aa->aa_iot;
if (bus_space_map(sc->sc_iot, aa->aa_dev->mem[0].addr,
aa->aa_dev->mem[0].size, 0, &sc->sc_ioh))
panic("sxiuartattach: bus_space_map failed!");
ioh = sc->sc_ioh;
if (aa->aa_dev->mem[0].addr == sxiuartconsaddr) {
cn_tab->cn_dev = makedev(12 /* XXX */, 0);
cdevsw[12] = sxiuartdev; /* KLUDGE */
printf(": console");
/* XXX compare uses of COM_HW_CONSOLE against com.c */
SET(sc->sc_hwflags, COM_HW_CONSOLE);
SET(sc->sc_swflags, COM_SW_SOFTCAR);
sxiuartconsiot = iot;
sxiuartconsioh = ioh;
}
timeout_set(&sc->sc_diag_tmo, sxiuart_diag, sc);
timeout_set(&sc->sc_dtr_tmo, sxiuart_raisedtr, sc);
sc->sc_si = softintr_establish(IPL_TTY, sxiuart_softint, sc);
if(sc->sc_si == NULL)
panic("%s: can't establish soft interrupt.",
sc->sc_dev.dv_xname);
sc->sc_frequency = 24000000; /* XXX */
if ((bus_space_read_1(sc->sc_iot, sc->sc_ioh, SXIUART_IIR) &
IIR_BUSY) == IIR_BUSY)
(void)bus_space_read_4(sc->sc_iot, sc->sc_ioh, SXIUART_USR);
sc->sc_ier = 0;
/* disable interrupts */
bus_space_write_1(iot, ioh, SXIUART_IER, sc->sc_ier);
/* clear and disable fifo */
bus_space_write_1(iot, ioh, SXIUART_FCR, 0 | RFIFOR | XFIFOR);
s = splhigh();
SET(sc->sc_mcr, MCR_DTR | MCR_RTS | MCR_IENABLE);
bus_space_write_1(sc->sc_iot, sc->sc_ioh, SXIUART_MCR, sc->sc_mcr);
splx(s);
arm_intr_establish(aa->aa_dev->irq[0], IPL_TTY,
sxiuart_intr, sc, sc->sc_dev.dv_xname);
printf("\n");
}
/*
* softintr_init:
*
* Initialize the software interrupt system.
*/
void
softintr_init()
{
struct alpha_soft_intr *asi;
int i;
for (i = 0; i < SI_NSOFT; i++) {
asi = &alpha_soft_intrs[i];
TAILQ_INIT(&asi->softintr_q);
simple_lock_init(&asi->softintr_slock);
asi->softintr_siq = i;
}
/* XXX Establish legacy software interrupt handlers. */
softnet_intrhand = softintr_establish(IPL_SOFTNET,
(void (*)(void *))netintr, NULL);
softclock_intrhand = softintr_establish(IPL_SOFTCLOCK,
(void (*)(void *))softclock, NULL);
}
void
vcons_attach(struct device *parent, struct device *self, void *aux)
{
struct vcons_softc *sc = (struct vcons_softc *)self;
struct vbus_attach_args *va = aux;
uint64_t sysino;
int vcons_is_input, vcons_is_output;
int node, maj;
sc->sc_si = softintr_establish(IPL_TTY, vcons_softintr, sc);
if (sc->sc_si == NULL)
panic(": can't establish soft interrupt");
if (vbus_intr_map(va->va_node, va->va_intr[0], &sysino))
printf(": can't map interrupt\n");
printf(": ivec 0x%lx", sysino);
sc->sc_ih = bus_intr_establish(va->va_bustag, sysino, IPL_TTY, 0,
vcons_intr, sc, sc->sc_dv.dv_xname);
if (sc->sc_ih == NULL) {
printf(", can't establish interrupt\n");
return;
}
node = OF_instance_to_package(OF_stdin());
vcons_is_input = (va->va_node == node);
node = OF_instance_to_package(OF_stdout());
vcons_is_output = (va->va_node == node);
if (vcons_is_input || vcons_is_output) {
if (vcons_is_input) {
cn_tab->cn_pollc = nullcnpollc;
cn_tab->cn_getc = vcons_cngetc;
/* Locate the major number. */
for (maj = 0; maj < nchrdev; maj++)
if (cdevsw[maj].d_open == vconsopen)
break;
cn_tab->cn_dev = makedev(maj, self->dv_unit);
}
if (vcons_is_output)
cn_tab->cn_putc = vcons_cnputc;
printf(", console");
}
printf("\n");
}
void *
tslot_intr_establish(pcmcia_chipset_handle_t pch, struct pcmcia_function *pf,
int ipl, int (*handler)(void *), void *arg, char *xname)
{
struct tslot_data *td = (struct tslot_data *)pch;
/*
* Note that this code relies on softintr_establish() to be
* used with real, hardware ipl values. All platforms with
* SBus support support this.
*/
td->td_intr = handler;
td->td_intrarg = arg;
td->td_softintr = softintr_establish(ipl, tslot_intr_dispatch, td);
return td->td_softintr != NULL ? td : NULL;
}
void
dt_attach(struct device *parent, struct device *self, void *aux)
{
struct ioasicdev_attach_args *d;
struct dt_attach_args dta;
struct dt_softc *sc;
struct dt_msg *msg;
int i;
d = aux;
sc = (struct dt_softc*)self;
dt_cninit();
msg = malloc(sizeof(*msg) * DT_BUF_CNT, M_DEVBUF, M_NOWAIT);
if (msg == NULL) {
printf("%s: memory exhausted\n", sc->sc_dv.dv_xname);
return;
}
sc->sc_sih = softintr_establish(IPL_SOFTSERIAL, dt_dispatch, sc);
if (sc->sc_sih == NULL) {
printf("%s: memory exhausted\n", sc->sc_dv.dv_xname);
free(msg, M_DEVBUF);
}
SIMPLEQ_INIT(&sc->sc_queue);
SLIST_INIT(&sc->sc_free);
for (i = 0; i < DT_BUF_CNT; i++, msg++)
SLIST_INSERT_HEAD(&sc->sc_free, msg, chain.slist);
ioasic_intr_establish(parent, d->iada_cookie, TC_IPL_TTY, dt_intr, sc);
printf("\n");
dta.dta_addr = DT_ADDR_KBD;
config_found(self, &dta, dt_print);
dta.dta_addr = DT_ADDR_MOUSE;
config_found(self, &dta, dt_print);
}
void
interrupt_init(void)
{
static const char *softintr_names[] = IPL_SOFTNAMES;
struct playstation2_soft_intr *asi;
int i;
evcnt_attach_static(&_playstation2_evcnt.clock);
evcnt_attach_static(&_playstation2_evcnt.sbus);
evcnt_attach_static(&_playstation2_evcnt.dmac);
for (i = 0; i < _IPL_NSOFT; i++) {
asi = &playstation2_soft_intrs[i];
TAILQ_INIT(&asi->softintr_q);
asi->softintr_ipl = IPL_SOFT + i;
simple_lock_init(&asi->softintr_slock);
evcnt_attach_dynamic(&asi->softintr_evcnt, EVCNT_TYPE_INTR,
NULL, "soft", softintr_names[i]);
}
/* XXX Establish legacy soft interrupt handlers. */
softnet_intrhand = softintr_establish(IPL_SOFTNET,
(void (*)(void *))netintr, NULL);
KDASSERT(softnet_intrhand != NULL);
/* install software interrupt handler */
intc_intr_establish(I_CH10_TIMER1, IPL_SOFT, timer1_intr, 0);
intc_intr_establish(I_CH11_TIMER2, IPL_SOFTCLOCK, timer2_intr, 0);
/* IPL_SOFTNET and IPL_SOFTSERIAL are shared interrupt. */
intc_intr_establish(I_CH12_TIMER3, IPL_SOFTNET, timer3_intr, 0);
/* enable SIF BIOS access */
md_imask = ~D_STAT_CIM_BIT(D_CH5_SIF0);
mips_cp0_status_write(0x00010801);
}
/*
* Attach a found zs.
*
* Match slave number to zs unit number, so that misconfiguration will
* not set up the keyboard as ttya, etc.
*/
void
zsc_attach(struct device *parent, struct device *self, void *aux)
{
struct zsc_softc *zsc = (void *)self;
struct confargs *ca = aux;
struct zsc_attach_args zsc_args;
volatile struct zschan *zc;
struct xzs_chanstate *xcs;
struct zs_chanstate *cs;
struct zsdevice *zsd;
int zsc_unit, channel;
int s, theflags;
int node, intr[3][3];
u_int regs[16];
zsc_unit = zsc->zsc_dev.dv_unit;
zsd = mapiodev(ca->ca_baseaddr + ca->ca_reg[0], ca->ca_reg[1]);
node = OF_child(ca->ca_node); /* ch-a */
for (channel = 0; channel < 2; channel++) {
if (OF_getprop(node, "AAPL,interrupts",
intr[channel], sizeof(intr[0])) == -1 &&
OF_getprop(node, "interrupts",
intr[channel], sizeof(intr[0])) == -1) {
printf(": cannot find interrupt property\n");
return;
}
if (OF_getprop(node, "reg", regs, sizeof(regs)) < 24) {
printf(": cannot find reg property\n");
return;
}
regs[2] += ca->ca_baseaddr;
regs[4] += ca->ca_baseaddr;
#ifdef ZS_TXDMA
zsc->zsc_txdmareg[channel] = mapiodev(regs[2], regs[3]);
zsc->zsc_txdmacmd[channel] =
dbdma_alloc(sizeof(dbdma_command_t) * 3);
memset(zsc->zsc_txdmacmd[channel], 0,
sizeof(dbdma_command_t) * 3);
dbdma_reset(zsc->zsc_txdmareg[channel]);
#endif
node = OF_peer(node); /* ch-b */
}
printf(": irq %d,%d\n", intr[0][0], intr[1][0]);
/*
* Initialize software state for each channel.
*/
for (channel = 0; channel < 2; channel++) {
zsc_args.channel = channel;
zsc_args.hwflags = zs_hwflags[zsc_unit][channel];
xcs = &zsc->xzsc_xcs_store[channel];
cs = &xcs->xzs_cs;
zsc->zsc_cs[channel] = cs;
cs->cs_channel = channel;
cs->cs_private = NULL;
cs->cs_ops = &zsops_null;
zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b;
cs->cs_reg_csr = &zc->zc_csr;
cs->cs_reg_data = &zc->zc_data;
memcpy(cs->cs_creg, zs_init_reg, 16);
memcpy(cs->cs_preg, zs_init_reg, 16);
/* Current BAUD rate generator clock. */
/* RTxC is 230400*16, so use 230400 */
cs->cs_brg_clk = PCLK / 16;
if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
cs->cs_defspeed = zs_get_speed(cs);
else
cs->cs_defspeed =
zs_defspeed[zsc_unit][channel];
cs->cs_defcflag = zs_def_cflag;
/* Make these correspond to cs_defcflag (-crtscts) */
cs->cs_rr0_dcd = ZSRR0_DCD;
cs->cs_rr0_cts = 0;
cs->cs_wr5_dtr = ZSWR5_DTR;
cs->cs_wr5_rts = 0;
#ifdef __notyet__
cs->cs_slave_type = ZS_SLAVE_NONE;
#endif
/* Define BAUD rate stuff. */
xcs->cs_clocks[0].clk = PCLK;
xcs->cs_clocks[0].flags = ZSC_RTXBRG | ZSC_RTXDIV;
xcs->cs_clocks[1].flags =
ZSC_RTXBRG | ZSC_RTXDIV | ZSC_VARIABLE | ZSC_EXTERN;
xcs->cs_clocks[2].flags = ZSC_TRXDIV | ZSC_VARIABLE;
xcs->cs_clock_count = 3;
if (channel == 0) {
theflags = 0; /*mac68k_machine.modem_flags;*/
/*xcs->cs_clocks[1].clk = mac68k_machine.modem_dcd_clk;*/
/*xcs->cs_clocks[2].clk = mac68k_machine.modem_cts_clk;*/
xcs->cs_clocks[1].clk = 0;
xcs->cs_clocks[2].clk = 0;
} else {
theflags = 0; /*mac68k_machine.print_flags;*/
xcs->cs_clocks[1].flags = ZSC_VARIABLE;
/*
* Yes, we aren't defining ANY clock source enables for the
* printer's DCD clock in. The hardware won't let us
* use it. But a clock will freak out the chip, so we
* let you set it, telling us to bar interrupts on the line.
*/
/*xcs->cs_clocks[1].clk = mac68k_machine.print_dcd_clk;*/
/*xcs->cs_clocks[2].clk = mac68k_machine.print_cts_clk;*/
xcs->cs_clocks[1].clk = 0;
xcs->cs_clocks[2].clk = 0;
}
if (xcs->cs_clocks[1].clk)
zsc_args.hwflags |= ZS_HWFLAG_NO_DCD;
if (xcs->cs_clocks[2].clk)
zsc_args.hwflags |= ZS_HWFLAG_NO_CTS;
/* Set defaults in our "extended" chanstate. */
xcs->cs_csource = 0;
xcs->cs_psource = 0;
xcs->cs_cclk_flag = 0; /* Nothing fancy by default */
xcs->cs_pclk_flag = 0;
if (theflags & ZSMAC_RAW) {
zsc_args.hwflags |= ZS_HWFLAG_RAW;
printf(" (raw defaults)");
}
/*
* XXX - This might be better done with a "stub" driver
* (to replace zstty) that ignores LocalTalk for now.
*/
if (theflags & ZSMAC_LOCALTALK) {
printf(" shielding from LocalTalk");
cs->cs_defspeed = 1;
cs->cs_creg[ZSRR_BAUDLO] = cs->cs_preg[ZSRR_BAUDLO] = 0xff;
cs->cs_creg[ZSRR_BAUDHI] = cs->cs_preg[ZSRR_BAUDHI] = 0xff;
zs_write_reg(cs, ZSRR_BAUDLO, 0xff);
zs_write_reg(cs, ZSRR_BAUDHI, 0xff);
/*
* If we might have LocalTalk, then make sure we have the
* Baud rate low-enough to not do any damage.
*/
}
/*
* We used to disable chip interrupts here, but we now
* do that in zscnprobe, just in case MacOS left the chip on.
*/
xcs->cs_chip = 0;
/* Stash away a copy of the final H/W flags. */
xcs->cs_hwflags = zsc_args.hwflags;
/*
* Look for a child driver for this channel.
* The child attach will setup the hardware.
*/
if (!config_found(self, (void *)&zsc_args, zsc_print)) {
/* No sub-driver. Just reset it. */
u_char reset = (channel == 0) ?
ZSWR9_A_RESET : ZSWR9_B_RESET;
s = splzs();
zs_write_reg(cs, 9, reset);
splx(s);
}
}
/* XXX - Now safe to install interrupt handlers. */
mac_intr_establish(parent, intr[0][0], IST_LEVEL, IPL_TTY,
zshard, NULL, "zs0");
mac_intr_establish(parent, intr[1][0], IST_LEVEL, IPL_TTY,
zshard, NULL, "zs1");
#ifdef ZS_TXDMA
mac_intr_establish(parent, intr[0][1], IST_LEVEL, IPL_TTY,
zs_txdma_int, (void *)0, "zsdma0");
mac_intr_establish(parent, intr[1][1], IST_LEVEL, IPL_TTY,
zs_txdma_int, (void *)1, "zsdma1");
#endif
zsc->zsc_softintr = softintr_establish(IPL_SOFTTTY, zssoft, zsc);
if (zsc->zsc_softintr == NULL)
panic("zsattach: could not establish soft interrupt");
/*
* Set the master interrupt enable and interrupt vector.
* (common to both channels, do it on A)
*/
cs = zsc->zsc_cs[0];
s = splzs();
/* interrupt vector */
zs_write_reg(cs, 2, zs_init_reg[2]);
/* master interrupt control (enable) */
zs_write_reg(cs, 9, zs_init_reg[9]);
splx(s);
/* connect power management for port 0 */
cs->enable = zs_enable;
cs->disable = zs_disable;
}
void
magma_attach(struct device *parent, struct device *dev, void *aux)
{
struct sbus_attach_args *sa = aux;
struct magma_softc *sc = (struct magma_softc *)dev;
const struct magma_board_info *card;
char magma_prom[40], *clockstr;
int chip, cd_clock;
getpropstringA(sa->sa_node, "magma_prom", magma_prom);
for (card = supported_cards; card->mb_name != NULL; card++) {
if (strcmp(sa->sa_name, card->mb_sbusname) != 0)
continue;
if (strcmp(magma_prom, card->mb_name) == 0)
break;
}
if (card->mb_name == NULL) {
printf(": %s (unsupported)\n", magma_prom);
return;
}
sc->sc_bustag = sa->sa_bustag;
clockstr = getpropstring(sa->sa_node, "clock");
if (strlen(clockstr) == 0)
cd_clock = 25;
else {
cd_clock = 0;
while (*clockstr != '\0')
cd_clock = cd_clock * 10 + *clockstr++ - '0';
}
if (sbus_bus_map(sa->sa_bustag, sa->sa_reg[0].sbr_slot,
sa->sa_reg[0].sbr_offset, sa->sa_reg[0].sbr_size,
0, 0, &sc->sc_iohandle) != 0) {
printf(": can't map registers\n");
return;
}
if (sa->sa_nintr < 1) {
printf(": can't find interrupt\n");
return;
}
sc->sc_ih = bus_intr_establish(sa->sa_bustag, sa->sa_pri, IPL_TTY, 0,
magma_hard, sc, dev->dv_xname);
if (sc->sc_ih == NULL) {
printf(": couldn't establish interrupt, pri %d\n",
INTLEV(sa->sa_pri));
bus_space_unmap(sc->sc_bustag, sc->sc_iohandle,
sa->sa_reg[0].sbr_size);
return;
}
sc->sc_sih = softintr_establish(IPL_TTY, magma_soft, sc);
if (sc->sc_sih == NULL) {
printf(": can't get soft intr\n");
bus_space_unmap(sc->sc_bustag, sc->sc_iohandle,
sa->sa_reg[0].sbr_size);
return;
}
printf(": %s\n", card->mb_realname);
sc->ms_board = card;
sc->ms_ncd1400 = card->mb_ncd1400;
sc->ms_ncd1190 = card->mb_ncd1190;
/* the SVCACK* lines are daisychained */
if (bus_space_subregion(sc->sc_bustag, sc->sc_iohandle,
card->mb_svcackr, 1, &sc->sc_svcackrh)) {
printf(": failed to map svcackr\n");
return;
}
if (bus_space_subregion(sc->sc_bustag, sc->sc_iohandle,
card->mb_svcackt, 1, &sc->sc_svcackth)) {
printf(": failed to map svcackt\n");
return;
}
if (bus_space_subregion(sc->sc_bustag, sc->sc_iohandle,
card->mb_svcackm, 1, &sc->sc_svcackmh)) {
printf(": failed to map svcackm\n");
return;
}
/* init the cd1400 chips */
for (chip = 0 ; chip < card->mb_ncd1400 ; chip++) {
struct cd1400 *cd = &sc->ms_cd1400[chip];
cd->cd_clock = cd_clock;
if (bus_space_subregion(sc->sc_bustag, sc->sc_iohandle,
card->mb_cd1400[chip], CD1400_REGMAPSIZE, &cd->cd_regh)) {
printf(": failed to map cd1400 regs\n");
return;
}
cd->cd_regt = sc->sc_bustag;
/* getpropstring(sa->sa_node, "chiprev"); */
/* seemingly the Magma drivers just ignore the propstring */
cd->cd_chiprev = CD1400_READ_REG(cd, CD1400_GFRCR);
dprintf(("%s attach CD1400 %d addr 0x%x rev %x clock %dMHz\n",
sc->ms_dev.dv_xname, chip, cd->cd_reg,
cd->cd_chiprev, cd->cd_clock));
/* clear GFRCR */
CD1400_WRITE_REG(cd, CD1400_GFRCR, 0x00);
/* reset whole chip */
cd1400_write_ccr(cd,
CD1400_CCR_CMDRESET | CD1400_CCR_FULLRESET);
/* wait for revision code to be restored */
while (CD1400_READ_REG(cd, CD1400_GFRCR) != cd->cd_chiprev)
;
/* set the Prescaler Period Register to tick at 1ms */
CD1400_WRITE_REG(cd, CD1400_PPR,
((cd->cd_clock * 1000000 / CD1400_PPR_PRESCALER + 500)
/ 1000));
/*
* The LC2+1Sp card is the only card that doesn't have a
* CD1190 for the parallel port, but uses channel 0 of the
* CD1400, so we make a note of it for later and set up the
* CD1400 for parallel mode operation.
*/
if (card->mb_npar && card->mb_ncd1190 == 0) {
CD1400_WRITE_REG(cd, CD1400_GCR, CD1400_GCR_PARALLEL);
cd->cd_parmode = 1;
}
}
/* init the cd1190 chips */
for (chip = 0 ; chip < card->mb_ncd1190 ; chip++) {
struct cd1190 *cd = &sc->ms_cd1190[chip];
if (bus_space_subregion(sc->sc_bustag, sc->sc_iohandle,
card->mb_cd1190[chip], CD1190_REGMAPSIZE, &cd->cd_regh)) {
printf(": failed to map cd1190 regs\n");
return;
}
cd->cd_regt = sc->sc_bustag;
dprintf(("%s attach CD1190 %d addr 0x%x (failed)\n",
sc->ms_dev.dv_xname, chip, cd->cd_reg));
/* XXX don't know anything about these chips yet */
}
/* configure the children */
(void)config_found(dev, mtty_match, NULL);
(void)config_found(dev, mbpp_match, NULL);
}
void
j720sspattach(struct device *parent, struct device *self, void *aux)
{
struct j720ssp_softc *sc = (void *)self;
struct sa11x0_softc *psc = (void *)parent;
struct sa11x0_attach_args *sa = aux;
struct wskbddev_attach_args a;
printf("\n");
sc->sc_iot = psc->sc_iot;
sc->sc_gpioh = psc->sc_gpioh;
if (bus_space_map(sc->sc_iot, sa->sa_addr, sa->sa_size, 0,
&sc->sc_ssph)) {
printf("%s: unable to map SSP registers\n",
sc->sc_dev.dv_xname);
return;
}
sc->sc_si = softintr_establish(IPL_SOFTCLOCK, j720kbdsoft, sc);
sc->sc_enabled = 0;
a.console = 0;
a.keymap = &j720kbd_keymapdata;
a.accessops = &j720kbd_accessops;
a.accesscookie = sc;
/* Do console initialization */
if (! (bootinfo->bi_cnuse & BI_CNUSE_SERIAL)) {
j720kbdcons_sc = *sc;
a.console = 1;
wskbd_cnattach(&j720kbd_consops, NULL, &j720kbd_keymapdata);
j720kbdcons_initstate = 1;
}
/*
* Attach the wskbd, saving a handle to it.
* XXX XXX XXX
*/
sc->sc_wskbddev = config_found(self, &a, wskbddevprint);
#ifdef DEBUG
/* Zero the stat counters */
j720sspwaitcnt = 0;
j720sspwaittime = 0;
#endif
if (j720kbdcons_initstate == 1)
j720kbd_enable(sc, 1);
/* LCD control is on the same bus */
config_hook(CONFIG_HOOK_SET, CONFIG_HOOK_BRIGHTNESS,
CONFIG_HOOK_SHARE, j720lcdparam, sc);
config_hook(CONFIG_HOOK_GET, CONFIG_HOOK_BRIGHTNESS,
CONFIG_HOOK_SHARE, j720lcdparam, sc);
config_hook(CONFIG_HOOK_GET, CONFIG_HOOK_BRIGHTNESS_MAX,
CONFIG_HOOK_SHARE, j720lcdparam, sc);
config_hook(CONFIG_HOOK_SET, CONFIG_HOOK_CONTRAST,
CONFIG_HOOK_SHARE, j720lcdparam, sc);
config_hook(CONFIG_HOOK_GET, CONFIG_HOOK_CONTRAST,
CONFIG_HOOK_SHARE, j720lcdparam, sc);
config_hook(CONFIG_HOOK_GET, CONFIG_HOOK_CONTRAST_MAX,
CONFIG_HOOK_SHARE, j720lcdparam, sc);
}
void
sbbc_attach_cons(struct sbbc_softc *sc, uint32_t offset)
{
struct sbbc_sram_cons *cons;
int sgcn_is_input, sgcn_is_output, node, maj;
char buf[32];
if (sc->sc_sram_solscie == NULL || sc->sc_sram_solscir == NULL ||
sc->sc_sram_scsolie == NULL || sc->sc_sram_scsolir == NULL)
return;
cons = (struct sbbc_sram_cons *)(sc->sc_sram + offset);
if (cons->cons_magic != SBBC_CONS_MAGIC ||
cons->cons_version < SBBC_CONS_VERSION)
return;
sc->sc_sram_cons = sc->sc_sram + offset;
sbbc_cons_input = sbbc_cons_output = sc;
sgcn_is_input = sgcn_is_output = 0;
sc->sc_cons_si = softintr_establish(IPL_TTY, sbbc_softintr_cons, sc);
if (sc->sc_cons_si == NULL)
panic("%s: can't establish soft interrupt",
sc->sc_dv.dv_xname);
*sc->sc_sram_solscie |= SBBC_SRAM_CONS_OUT;
*sc->sc_sram_scsolie |= SBBC_SRAM_CONS_IN | SBBC_SRAM_CONS_BRK;
/* Take over console input. */
prom_serengeti_set_console_input("CON_CLNT");
/* Check for console input. */
node = OF_instance_to_package(OF_stdin());
if (OF_getprop(node, "name", buf, sizeof(buf)) > 0)
sgcn_is_input = (strcmp(buf, "sgcn") == 0);
/* Check for console output. */
node = OF_instance_to_package(OF_stdout());
if (OF_getprop(node, "name", buf, sizeof(buf)) > 0)
sgcn_is_output = (strcmp(buf, "sgcn") == 0);
if (sgcn_is_input) {
cn_tab->cn_pollc = nullcnpollc;
cn_tab->cn_getc = sbbc_cngetc;
}
if (sgcn_is_output)
cn_tab->cn_putc = sbbc_cnputc;
if (sgcn_is_input || sgcn_is_output) {
/* Locate the major number. */
for (maj = 0; maj < nchrdev; maj++)
if (cdevsw[maj].d_open == sbbcopen)
break;
cn_tab->cn_dev = makedev(maj, sc->sc_dv.dv_unit);
/* Let current output drain. */
DELAY(2000000);
printf("%s: console\n", sc->sc_dv.dv_xname);
}
}
int
viocon_port_create(struct viocon_softc *sc, int portidx)
{
struct virtio_softc *vsc = sc->sc_virtio;
int rxidx, txidx, allocsize, nsegs;
char name[6];
struct viocon_port *vp;
caddr_t kva;
struct tty *tp;
vp = malloc(sizeof(*vp), M_DEVBUF, M_WAITOK|M_CANFAIL|M_ZERO);
if (vp == NULL)
return ENOMEM;
sc->sc_ports[portidx] = vp;
vp->vp_sc = sc;
DBGPRINT("vp: %p\n", vp);
if (portidx == 0)
rxidx = 0;
else
rxidx = 2 * (portidx + 1);
txidx = rxidx + 1;
snprintf(name, sizeof(name), "p%drx", portidx);
if (virtio_alloc_vq(vsc, &vsc->sc_vqs[rxidx], rxidx, BUFSIZE, 1,
name) != 0) {
printf("\nCan't alloc %s virtqueue\n", name);
goto err;
}
vp->vp_rx = &vsc->sc_vqs[rxidx];
vp->vp_rx->vq_done = viocon_rx_intr;
vp->vp_si = softintr_establish(IPL_TTY, viocon_rx_soft, vp);
DBGPRINT("rx: %p\n", vp->vp_rx);
snprintf(name, sizeof(name), "p%dtx", portidx);
if (virtio_alloc_vq(vsc, &vsc->sc_vqs[txidx], txidx, BUFSIZE, 1,
name) != 0) {
printf("\nCan't alloc %s virtqueue\n", name);
goto err;
}
vp->vp_tx = &vsc->sc_vqs[txidx];
vp->vp_tx->vq_done = viocon_tx_intr;
DBGPRINT("tx: %p\n", vp->vp_tx);
vsc->sc_nvqs += 2;
allocsize = (vp->vp_rx->vq_num + vp->vp_tx->vq_num) * BUFSIZE;
if (bus_dmamap_create(vsc->sc_dmat, allocsize, 1, allocsize, 0,
BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &vp->vp_dmamap) != 0)
goto err;
if (bus_dmamem_alloc(vsc->sc_dmat, allocsize, 8, 0, &vp->vp_dmaseg,
1, &nsegs, BUS_DMA_NOWAIT | BUS_DMA_ZERO) != 0)
goto err;
if (bus_dmamem_map(vsc->sc_dmat, &vp->vp_dmaseg, nsegs,
allocsize, &kva, BUS_DMA_NOWAIT) != 0)
goto err;
if (bus_dmamap_load(vsc->sc_dmat, vp->vp_dmamap, kva,
allocsize, NULL, BUS_DMA_NOWAIT) != 0)
goto err;
vp->vp_rx_buf = (unsigned char *)kva;
/*
* XXX use only a small circular tx buffer instead of many BUFSIZE buffers?
*/
vp->vp_tx_buf = vp->vp_rx_buf + vp->vp_rx->vq_num * BUFSIZE;
if (vsc->sc_features & VIRTIO_CONSOLE_F_SIZE) {
vp->vp_cols = virtio_read_device_config_2(vsc,
VIRTIO_CONSOLE_COLS);
vp->vp_rows = virtio_read_device_config_2(vsc,
VIRTIO_CONSOLE_ROWS);
}
tp = ttymalloc(1000000);
tp->t_oproc = vioconstart;
tp->t_param = vioconparam;
tp->t_hwiflow = vioconhwiflow;
tp->t_dev = (sc->sc_dev.dv_unit << 4) | portidx;
vp->vp_tty = tp;
DBGPRINT("tty: %p\n", tp);
virtio_start_vq_intr(vsc, vp->vp_rx);
virtio_start_vq_intr(vsc, vp->vp_tx);
return 0;
err:
panic("%s failed", __func__);
return -1;
}