/**
* Write data to SPI device
*
* @v nvs NVS device
* @v address Address from which to read
* @v data Data buffer
* @v len Length of data buffer
* @ret rc Return status code
*/
int spi_write ( struct nvs_device *nvs, unsigned int address,
const void *data, size_t len ) {
struct spi_device *device = nvs_to_spi ( nvs );
struct spi_bus *bus = device->bus;
unsigned int command = spi_command ( SPI_WRITE, address,
device->munge_address );
int rc;
DBG ( "SPI %p writing %zd bytes to %#04x\n", device, len, address );
if ( ( rc = bus->rw ( bus, device, SPI_WREN, -1,
NULL, NULL, 0 ) ) != 0 ) {
DBG ( "SPI %p failed to write-enable device\n", device );
return rc;
}
if ( ( rc = bus->rw ( bus, device, command, address,
data, NULL, len ) ) != 0 ) {
DBG ( "SPI %p failed to write data to device\n", device );
return rc;
}
if ( ( rc = spi_wait ( device ) ) != 0 ) {
DBG ( "SPI %p failed to complete write operation\n", device );
return rc;
}
return 0;
}
/**
* Fill a box on the lcd
*
* @param sx Start X
* @param sy Start Y
* @param ex End X
* @param ey End Y
* @param color Color
*/
void lcd_box( char sx, char sy, char ex, char ey, char color )
{
spi_command( CASET );
spi_data( sx );
spi_data( ex );
spi_command( PASET );
spi_data( sy );
spi_data( ey );
spi_command( RAMWR );
int len = ( ( ex - sx ) * ( ey - sy ) ) * 2;
for ( int i = 0; i < len; i++ )
{
spi_data( color );
}
}
//row&=7;
//spi_command(0x80); //column
//spi_command(0x40|row); //row
//rc=0;
//for(ra=0;ra<11;ra++)
//{
//if(s[ra]==0) break;
//for(rb=0;rb<8;rb++)
//{
//rd=s[ra];
//spi_data(fontdata[rd][rb]);
//rc++;
//}
//}
//for(;rc<84;rc++) spi_data(0);
//}
//------------------------------------------------------------------------
void show_time ( void )
{
unsigned int ra;
unsigned int rb;
unsigned int rc;
unsigned int rd;
unsigned int re;
unsigned int rf;
uart_putc(0x30+(tim[0]&0xF));
uart_putc(0x30+(tim[1]&0xF));
uart_putc(0x30+(tim[2]&0xF));
uart_putc(0x30+(tim[3]&0xF));
uart_putc(0x0D);
uart_putc(0x0A);
for(rb=0;rb<5;rb++)
{
spi_command(0x80); //column
spi_command(0x40|rb); //row
if(tim[0]==0) re=0x00;
else re=0xFF;
for(rf=0;rf<6;rf++) spi_data(re);
for(rf=0;rf<6;rf++) spi_data(0x00);
for(ra=1;ra<4;ra++)
{
rc=clockdata[tim[ra]][rb];
for(rd=0x8;rd;rd>>=1)
{
if(rc&rd) re=0xFF;
else re=0x00;
for(rf=0;rf<6;rf++) spi_data(re);
}
}
//for(rf=0;rf<0x1000;rf++) dummy(rf);
}
}
/**********************************************************
* Routine: initialize_lcd
* Description: Initializes the LCD and displays the
* splash logo
**********************************************************/
void initialize_lcd(int show_what)
{
char *pwm_on[2] = {"pwm", "7F"};
//gpio 119 ADO_SPK_ENABLE
//
//__raw_writew(0x1B,0x4a100110);
//gpio_119 gpio_120 pull high
__raw_writel(0x001B001B,0x4a100110);
__raw_writew(__raw_readw(0x48059134) & 0xFEFF, 0x48059134);
__raw_writew(__raw_readw(0x4805913C) | 0x0100, 0x4805913C);
__raw_writew(__raw_readw(0x48059134) & 0xFF7F, 0x48059134);
__raw_writew(__raw_readw(0x4805913C) | 0x0080, 0x4805913C);
spi_init();
/* Enable GPIO_45 (LCD_PWR_ON) */
__raw_writew(0x1B,0x4a10006A);
__raw_writew(__raw_readw(0x48055134) & 0xDFFF, 0x48055134);//gpio_OE gpio45
__raw_writew(__raw_readw(0x4805513C) | 0x2000, 0x4805513C);//gpio_dataout gpio45
/* Enable GPIO_47 (OMAP_3V_ENABLE, 3.3 V rail) */
__raw_writel(0x001B0007,0x4a10006C);
__raw_writew(__raw_readw(0x48055134) & 0x7FFF, 0x48055134);//gpio_OE gpio47
__raw_writew(__raw_readw(0x4805513C) | 0x8000, 0x4805513C);//gpio_dataout gpio47
udelay(10000);
//kc1 lcd initialize
spi_command();
udelay(2000);
/* Enable GPIO_37 (OMAP_RGB_SHTDOWN, switch to LVDS mode) */
__raw_writew(0x1B,0x4a10005A);
__raw_writew(__raw_readw(0x48055134) & 0xFFDF, 0x48055134);//gpio_OE gpio37
__raw_writew(__raw_readw(0x4805513C) | 0x0020, 0x4805513C);//gpio_dataout gpio37
show_black_data();
if(show_what==OTTER_LCD_DISPLAY_LOW_BATT_SCREEN)
show_lowbattery();
else
show_splash();
lcd_config();
/* Turn on backlight */
set_omap_pwm(NULL, 0, 2, pwm_on);
}
/**
* Read data from SPI device
*
* @v nvs NVS device
* @v address Address from which to read
* @v data Data buffer
* @v len Length of data buffer
* @ret rc Return status code
*/
int spi_read ( struct nvs_device *nvs, unsigned int address,
void *data, size_t len ) {
struct spi_device *device = nvs_to_spi ( nvs );
struct spi_bus *bus = device->bus;
unsigned int command = spi_command ( SPI_READ, address,
device->munge_address );
int rc;
DBG ( "SPI %p reading %zd bytes from %#04x\n", device, len, address );
if ( ( rc = bus->rw ( bus, device, command, address,
NULL, data, len ) ) != 0 ) {
DBG ( "SPI %p failed to read data from device\n", device );
return rc;
}
return 0;
}
//------------------------------------------------------------------------
int notmain ( void )
{
unsigned int ra;
unsigned int rf;
uart_init();
hexstring(0x12345678);
for(ra=0;ra<10;ra++)
{
hexstring(ra);
}
spi_init();
PUT32(GPSET0,1<<7); //reset high
for(ra=0;ra<0x10000;ra++) dummy(ra);
PUT32(GPCLR0,1<<7); //reset low
for(ra=0;ra<0x10000;ra++) dummy(ra);
PUT32(GPSET0,1<<7); //reset high
spi_command(0x21); //extended commands
// spi_command(0xB0); //vop less contrast
spi_command(0xBF); //vop more contrast
spi_command(0x04); //temp coef
spi_command(0x14); //bias mode 1:48
spi_command(0x20); //extended off
spi_command(0x0C); //display on
spi_command(0x80); //column
spi_command(0x40|5); //row
for(rf=0;rf<84;rf++) spi_data(0x00);
tim[0]=0;
tim[1]=0;
tim[2]=0;
tim[3]=0;
show_time();
do_nmea();
hexstring(0x12345678);
return(0);
}
/**
* Initialize the lcd
*/
void lcd_init()
{
enable_lcd();
setPin( LCD_PORT, LCD_RST, 0 );
setPin( LCD_PORT, LCD_RST, 1 );
ROM_SysCtlDelay( 500 );
spi_command( SLEEPOUT );
spi_command( BSTRON );
spi_command( COLMOD );
spi_command( MADCTL );
spi_data( 0xC0 );
spi_command( SETCON );
spi_data( 0x40 );
spi_command( DISPON );
setPin( LCD_PORT, LCD_CS, 0 );
lcd_clear();
}
/*******************************************************************************
* Pull EP1 data
*******************************************************************************/
void ep1_pool(void){
BYTE i;
WORD adr;
BYTE new_data = 0;
// Test data for internal test
if(FPGA_INT0 && FPGA_DONE && !prev_done && !cmd_cnt){
EP8FIFOCFG = 0x00; SYNCDELAY;
FIFORESET = 0x08; SYNCDELAY;
FIFORESET = 0x00; SYNCDELAY;
EP8FIFOBUF[0] = 0x12;
EP8FIFOBUF[1] = 0x34;
EP8FIFOBUF[2] = 0x56;
EP8FIFOBUF[3] = 0x78;
EP8FIFOBUF[4] = 0x90;
EP8FIFOBUF[5] = 0xAB;
EP8FIFOBUF[6] = 0xCD;
EP8FIFOBUF[7] = 0xEF;
EP8BCH = 0;
EP8BCL = 8;
EP8FIFOCFG = 0x10; SYNCDELAY;
prev_done = 1;
}
if( !( EP1OUTCS & 0x02) ){ // Got something
cmd_cnt++;
for (i = 0; i < 0x40; i++)
EP1INBUF[i] = 0xFF; // fill output buffer
switch(EP1OUTBUF[0]){ // Decode command
//-----------------------------------------------------------------
default:
case CMD_READ_VERSION:
EP1INBUF[0] = fx2_ver_maj_;
EP1INBUF[1] = fx2_ver_min_;
EP1INBUF[2] = fx2_tip_maj_;
EP1INBUF[3] = fx2_tip_min_;
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_SET_AUTORESPONSE:
sts_int_auto_configured = 1;
iar_adress = EP1OUTBUF[1];
iar_count = EP1OUTBUF[2];
iar_int_idx = 0;
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_GET_AUTORESPONSE:
EP1INBUF[0] = iar_int_idx;
for(i = 0; i < 32; i++)
EP1INBUF[i+1] = auto_response_data[i];
iar_int_idx = 0;
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_SWITCH_MODE:
sts_current_mode = 1;
new_data = 1;
EP1INBUF[0] = EP1OUTBUF[1];
break;
//-----------------------------------------------------------------
case CMD_READ_STATUS:
sts_flash_busy = get_flash_busy();
sts_booting = FPGA_DONE;
sts_fpga_prog = 0xaa;
sts_high_speed_mode = (USBCS & bmHSM) ? 1 : 255;
new_data = 1;
EP1INBUF[0] = sts_fifo_error;
EP1INBUF[1] = sts_current_mode;
EP1INBUF[2] = sts_flash_busy;
EP1INBUF[3] = sts_fpga_prog;
EP1INBUF[4] = sts_booting;
EP1INBUF[5] = sts_i2c_new_data;
EP1INBUF[6] = sts_int_auto_configured;
EP1INBUF[7] = sts_high_speed_mode;
sts_i2c_new_data = 0;
break;
//-----------------------------------------------------------------
case CMD_RESET_FIFO_STATUS:
sts_fifo_error = 0;
FIFORESET = 0x80; SYNCDELAY; // NAK all requests from host.
switch(EP1OUTBUF[1]){
case 2:
EP2FIFOCFG = 0x48; SYNCDELAY;
FIFORESET = 0x02; SYNCDELAY;
break;
case 4:
EP4FIFOCFG = 0x48; SYNCDELAY;
FIFORESET = 0x04; SYNCDELAY;
break;
case 6:
EP6FIFOCFG = 0x48; SYNCDELAY;
FIFORESET = 0x06; SYNCDELAY;
break;
default: // 0
EP2FIFOCFG = 0x48; SYNCDELAY;
EP4FIFOCFG = 0x48; SYNCDELAY;
EP6FIFOCFG = 0x48; SYNCDELAY;
EP8FIFOCFG = 0x10; SYNCDELAY;
FIFORESET = 0x02; SYNCDELAY;
FIFORESET = 0x04; SYNCDELAY;
FIFORESET = 0x06; SYNCDELAY;
}
FIFORESET = 0x00; SYNCDELAY; // Resume normal operation.
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_FLASH_WRITE:
if (EP1OUTBUF[4] > 59) EP1OUTBUF[4] = 59;
page_write(EP1OUTBUF[1], EP1OUTBUF[2], EP1OUTBUF[3], &EP1OUTBUF[5], EP1OUTBUF[4]); //highest, high, low adr, read_ptr, size
//-----------------------------------------------------------------
case CMD_FLASH_READ:
if (EP1OUTBUF[4] > 64) EP1OUTBUF[4] = 64;
page_read(EP1OUTBUF[1], EP1OUTBUF[2], EP1OUTBUF[3], &EP1INBUF[0], EP1OUTBUF[4]); //highest, high, low adr, read_ptr, size
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_FLASH_ERASE:
// busy_polling();
// On some modules it cause API error - better to do it from software side
bulk_erase();
new_data = 1;
sts_flash_busy = 1;
break;
//-----------------------------------------------------------------
case CMD_SECTOR_ERASE:
sector_erase(EP1OUTBUF[1]);
new_data = 1;
sts_flash_busy = 1;
break;
//-----------------------------------------------------------------
case CMD_FLASH_WRITE_COMMAND:
EP1INBUF[0] = 0x55;
spi_command(EP1OUTBUF[1], &EP1OUTBUF[3], EP1OUTBUF[2], &EP1INBUF[1]);
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_EEPROM_WRITE:
adr = EP1OUTBUF[1];
adr = (adr << 8) + EP1OUTBUF[2];
if (EP1OUTBUF[3] > 32) EP1OUTBUF[3] = 32;
EEPROMWrite(adr, EP1OUTBUF[3], &EP1OUTBUF[4]); // adress, size, data
//-----------------------------------------------------------------
case CMD_EEPROM_READ:
adr = EP1OUTBUF[1];
adr = (adr << 8) + EP1OUTBUF[2];
EEPROMRead(adr, EP1OUTBUF[3], &EP1INBUF[0]); // adress, size, data
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_GET_FIFO_STATUS:
EP1INBUF[0] = EP2CS;
EP1INBUF[1] = EP4CS;
EP1INBUF[2] = EP6CS;
EP1INBUF[3] = EP8CS;
EP1INBUF[4] = EP2FIFOBCH;
EP1INBUF[5] = EP4FIFOBCH;
EP1INBUF[6] = EP6FIFOBCH;
EP1INBUF[7] = EP8FIFOBCH;
EP1INBUF[8] = EP2FIFOBCL;
EP1INBUF[9] = EP4FIFOBCL;
EP1INBUF[10] = EP6FIFOBCL;
EP1INBUF[11] = EP8FIFOBCL;
EP1INBUF[12] = EP2FIFOFLGS;
EP1INBUF[13] = EP4FIFOFLGS;
EP1INBUF[14] = EP6FIFOFLGS;
EP1INBUF[15] = EP8FIFOFLGS;
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_I2C_WRITE:
I2CWrite(EP1OUTBUF[1], EP1OUTBUF[2], &EP1OUTBUF[3]); // adress, size, data
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_I2C_READ:
I2CRead(EP1OUTBUF[1], EP1OUTBUF[2], &EP1INBUF[0]); // adress, size, data
new_data = 1;
break;
//-----------------------------------------------------------------
/*
case CMD_I2C_WRITE_READ:
i = EP1OUTBUF[1];
I2CWrite(i, EP1OUTBUF[2], &EP1OUTBUF[4]); // adress, size, data
delaycnt = 0;
while (INT0_PIN == 0){
EZUSB_Delay1ms();
delaycnt++;
if (delaycnt > 800)
break;
continue;
}
I2CRead(i, EP1OUTBUF[3], &EP1INBUF[0]); // adress, size, data
new_data = 1;
break;
*/
//-----------------------------------------------------------------
case CMD_FPGA_POWER:
if (EP1OUTBUF[1] == 0){
FPGA_POWER = 0;
sts_int_auto_configured = 0;
}
else{
IOD = 0x03; // Enable Power and disable Reset
OED = 0x03; // PROG_B and POWER
FPGA_POWER = 1;
}
EP1INBUF[0] = (FPGA_POWER) ? 1 : 0;
EP1INBUF[1] = 0xAA;
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_FPGA_RESET:
FPGA_INT1 = (EP1OUTBUF[1]) ? 1 : 0;
EP1INBUF[0] = FPGA_INT1;
EP1INBUF[1] = 0xAA;
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_DEV_LOCK:
if(EP1OUTBUF[1] == 0x01){ // Driver trying to lock device
if(lock == 0){ // Device is free
EP1INBUF[0] = 0x22; // Sucessfull lock
lock = 1;
}
else // Device is locked
EP1INBUF[0] = 0x00; // Already locked
}
else{ // Driver trying to unlock device
if(lock == 1){ // Device is locked
EP1INBUF[0] = 0x33; // Sucessfull unlock
lock = 0;
}
else // Device is unlocked
EP1INBUF[0] = 0x00; // Got problem
}
new_data = 1;
break;
//-----------------------------------------------------------------
}
EP1OUTBC = EP1DATA_COUNT; // Free input buffer
}
if(new_data){ // Have something to send
if ( !(EP1INCS & 0x02)){ // Can send ?
EP1INBC = EP1DATA_COUNT; // Send
new_data = 0;
}
}
}
