/* aica_chn_halt - write to spu to halt playback */
static void aica_chn_halt(void)
{
unsigned long flags;
spu_write_wait();
local_irq_save(flags);
writel(AICA_CMD_KICK | AICA_CMD_STOP, (u32 *) AICA_CONTROL_POINT);
local_irq_restore(flags);
}
/* spu_enable - set spu registers to enable sound output */
static void spu_enable(void)
{
unsigned long flags;
u32 regval = readl(ARM_RESET_REGISTER);
regval &= ~1;
spu_write_wait();
local_irq_save(flags);
writel(regval, ARM_RESET_REGISTER);
local_irq_restore(flags);
}
/* spu_memload - write to SPU address space */
static void spu_memload(u32 toi, void *from, int length)
{
unsigned long flags;
u32 *froml = from;
u32 __iomem *to = (u32 __iomem *) (SPU_MEMORY_BASE + toi);
int i;
u32 val;
length = DIV_ROUND_UP(length, 4);
spu_write_wait();
for (i = 0; i < length; i++) {
if (!(i % 8))
spu_write_wait();
val = *froml;
local_irq_save(flags);
writel(val, to);
local_irq_restore(flags);
froml++;
to++;
}
}
/* spu_disable - set spu registers to stop sound output */
static void spu_disable(void)
{
int i;
unsigned long flags;
u32 regval;
spu_write_wait();
regval = readl(ARM_RESET_REGISTER);
regval |= 1;
spu_write_wait();
local_irq_save(flags);
writel(regval, ARM_RESET_REGISTER);
local_irq_restore(flags);
for (i = 0; i < 64; i++) {
spu_write_wait();
regval = readl(SPU_REGISTER_BASE + (i * 0x80));
regval = (regval & ~0x4000) | 0x8000;
spu_write_wait();
local_irq_save(flags);
writel(regval, SPU_REGISTER_BASE + (i * 0x80));
local_irq_restore(flags);
}
}
/* spu_memset - write to memory in SPU address space */
static void spu_memset(u32 toi, u32 what, int length)
{
int i;
unsigned long flags;
snd_assert(length % 4 == 0, return);
for (i = 0; i < length; i++) {
if (!(i % 8))
spu_write_wait();
local_irq_save(flags);
writel(what, toi + SPU_MEMORY_BASE);
local_irq_restore(flags);
toi++;
}
}
