void __sramfunc rk30_suspend_voltage_resume(unsigned int vol) { uint8 slaveaddr; uint16 slavereg; uint8 data,ret = 0; slaveaddr = I2C_SADDR; //slave device addr slavereg = 0x22; // reg addr sram_i2c_init(); //init i2c device slavereg = 0x22; // log reg addr if (log_voltage >= 0x3b ){ // set log <= 1.3v data = 0x3b; } else if(log_voltage <= 0x1f){ data = 0x1f; // set log >= 0.95v } else data = log_voltage; sram_i2c_write(slaveaddr, slavereg, data); slavereg = 0x25; // arm reg addr if (arm_voltage >= 0x3b ){ // set arm <= 1.3v data = 0x3b; } else if(arm_voltage <= 0x1f){ data = 0x1f; // set arm >= 0.95v } else data = arm_voltage; sram_i2c_write(slaveaddr, slavereg, data); sram_i2c_deinit(); //deinit i2c device }
void __sramfunc rk30_suspend_voltage_set(unsigned int vol) { uint8 slaveaddr; uint16 slavereg; uint8 data,ret = 0; uint8 rtc_status_reg = 0x11; slaveaddr = I2C_SADDR; //slave device addr sram_i2c_init(); //init i2c device ret = sram_i2c_read(slaveaddr, rtc_status_reg); sram_i2c_write(slaveaddr, rtc_status_reg, ret); slavereg = 0x25; //arm data = 0x1b; //set arm 0.9V arm_voltage = sram_i2c_read(slaveaddr, slavereg); sram_i2c_write(slaveaddr, slavereg, data); slavereg = 0x22; //log data = 0x1b; //set log 0.9V log_voltage = sram_i2c_read(slaveaddr, slavereg); sram_i2c_write(slaveaddr, slavereg, data); sram_i2c_deinit(); //deinit i2c device }
void __sramfunc rk30_suspend_voltage_set(unsigned int vol) { uint8 slaveaddr; uint16 slavereg; uint8 data,ret = 0; uint8 rtc_status_reg = 0x11; slaveaddr = I2C_SADDR; //slave device addr slavereg = 0x22; // reg addr data = 0x23; //set arm 1.0v sram_i2c_init(); //init i2c device ret = sram_i2c_read(slaveaddr, rtc_status_reg); sram_i2c_write(slaveaddr, rtc_status_reg, ret); arm_voltage = sram_i2c_read(slaveaddr, slavereg); // sram_printhex(ret); sram_i2c_write(slaveaddr, slavereg, data);// sram_i2c_deinit(); //deinit i2c device }
void __sramfunc rk30_suspend_voltage_set(unsigned int vol) { uint8 slaveaddr; uint8 slavereg; uint8 data,ret = 0; uint8 rtc_status_reg = 0x11; sram_i2c_init(); //init i2c device #if defined(CONFIG_MFD_TPS65910) if(pmic_is_tps65910()) { slaveaddr = 0x2d; //slave device addr slavereg = 0x22; // reg addr data = 0x1C; //set arm 1.0v ret = sram_i2c_read(slaveaddr, rtc_status_reg); sram_i2c_write(slaveaddr, rtc_status_reg, ret); arm_voltage = sram_i2c_read(slaveaddr, slavereg); #if defined ( CONFIG_ARCH_RK3026) logic_voltage = sram_i2c_read(slaveaddr, 0x25); sram_i2c_write(slaveaddr, 0x25, data);// #endif //sram_printhex(ret); sram_i2c_write(slaveaddr, slavereg, data);// } #endif #if defined(CONFIG_REGULATOR_ACT8931) if(pmic_is_act8931()) { slaveaddr = 0x5b; //slave device addr slavereg = 0x40; // reg addr data = 0x10; //set arm 1.0v arm_voltage = sram_i2c_read(slaveaddr, slavereg); //sram_printhex(ret); sram_i2c_write(slaveaddr, slavereg, data);// sram_i2c_write(slaveaddr,( slavereg+0x1), data);// } #endif sram_i2c_deinit(); //deinit i2c device }
void __sramfunc rk30_suspend_voltage_set(unsigned int vol) { sram_i2c_init(); #if defined(CONFIG_KP_AXP22) /*//cpu arm to 0.95V*/ arm_voltage = sram_i2c_read(0x34, 0x22); sram_i2c_write(0x34, 0x22, 0x11); //cpu code to 0.9V vcode_voltage = sram_i2c_read(0x34, 0x23); sram_i2c_write(0x34, 0x23, 0x0f); //cpu ddr to 1.35V vddr_voltage = sram_i2c_read(0x34, 0x25); sram_i2c_write(0x34, 0x25, 0x07); #if defined(CONFIG_CLK_SWITCH_TO_GND) if (sram_pm_state == PM_SUSPEND_MEM) { //aldo3 VCCA_3V3 sram_i2c_write(0x34, 0x13, 0x00); //ldo_ctl 关闭晶振 sram_i2c_write(0x34, 0x16, 0x1f); axpreg12 = sram_i2c_read(0x34, 0x12); axpreg12 |= 0x10; /*open dldo2 for sleep control*/ #if !defined(CONFIG_SPI) /* for xc3 tp, do not close tp power */ axpreg12 |= 0x02; /* open eldo2 TP_3.3V */ #endif sram_i2c_write(0x34, 0x12, axpreg12); } #endif #endif //---------------------------------------------- #if defined(CONFIG_REGULATOR_ACT8931) uint8 slaveaddr; uint8 slavereg; uint8 data; slaveaddr = 0x5b; {//ARM slavereg = 0x40; data = 0x0e; //set arm 0.95v sram_i2c_read(); (slaveaddr, slavereg, data); (slaveaddr,( slavereg+0x1), data); } #if defined(CONFIG_CLK_SWITCH_TO_GND) if (sram_pm_state == PM_SUSPEND_MEM) {//LDO2 slavereg = 0x55; data = 0xc1; //ldo enable sram_i2c_write(slaveaddr, slavereg, data); } #endif #endif sram_i2c_deinit(); }
void __sramfunc rk30_suspend_voltage_resume(unsigned int vol) { uint8 slaveaddr; uint8 slavereg; uint8 data,ret = 0; #if defined ( CONFIG_ARCH_RK3026) uint8 data2; data2 = logic_voltage; #endif data = arm_voltage; sram_i2c_init(); //init i2c device #if defined(CONFIG_MFD_TPS65910) if(pmic_is_tps65910()) { slaveaddr = 0x2d; //slave device addr slavereg = 0x22; // reg add sram_i2c_write(slaveaddr, slavereg, data); sram_udelay(20000); #if defined ( CONFIG_ARCH_RK3026) sram_i2c_write(slaveaddr, 0x25, data2); sram_udelay(20000); #endif } #endif #if defined(CONFIG_REGULATOR_ACT8931) if(pmic_is_act8931()) { slaveaddr = 0x5b; //slave device addr slavereg = 0x40; // reg addr sram_i2c_write(slaveaddr, slavereg, data); sram_i2c_write(slaveaddr, (slavereg+0x1), data); sram_udelay(20000); } #endif sram_i2c_deinit(); //deinit i2c device }
void __sramfunc rk30_suspend_voltage_resume(unsigned int vol) { sram_i2c_init(); #if defined(CONFIG_KP_AXP22) #if defined(CONFIG_CLK_SWITCH_TO_GND) if (sram_pm_state == PM_SUSPEND_MEM) { #if defined(CONFIG_MACH_RK3026_E602) //aldo3 VCCA_3V3 sram_i2c_write(0x34, 0x13, 0x80); #endif axpreg12 &= (~0x10); /*close dldo2 for sleep control*/ sram_i2c_write(0x34, 0x12, axpreg12); } #endif sram_i2c_write(0x34, 0x22, arm_voltage); sram_i2c_write(0x34, 0x23, vcode_voltage); sram_i2c_write(0x34, 0x25, vddr_voltage); #endif #if defined(CONFIG_REGULATOR_ACT8931) uint8 slaveaddr; uint8 slavereg; uint8 data; slaveaddr = 0x5b; #if defined(CONFIG_CLK_SWITCH_TO_GND) if (sram_pm_state == PM_SUSPEND_MEM) {//LDO2 slavereg = 0x55; data = 0x41; //ldo disable sram_i2c_write(slaveaddr, slavereg, data); } #endif {//ARM slavereg = 0x40; data = arm_voltage; sram_i2c_write(slaveaddr, slavereg, data); sram_i2c_write(slaveaddr, (slavereg+0x1), data); sram_udelay(20000); } #endif sram_i2c_deinit(); }