/*
* Rebuild the interpreter frame then punt to the interpreter to execute
* instruction at specified PC.
*
* Currently parameters are passed to the current frame, so we just need to
* grow the stack save area above it, fill certain fields in StackSaveArea and
* Thread that are skipped during whole-method invocation (specified below),
* then return to the interpreter.
*
* StackSaveArea:
* - prevSave
* - prevFrame
* - savedPc
* - returnAddr
* - method
*
* Thread:
* - method
* - methodClassDex
* - curFrame
*/
static void genMethodInflateAndPunt(CompilationUnit *cUnit, MIR *mir,
BasicBlock *bb)
{
int oldStackSave = r0;
int newStackSave = r1;
int oldFP = r2;
int savedPC = r3;
int currentPC = r4PC;
int returnAddr = r7;
int method = r8;
int pDvmDex = r9;
/*
* TODO: check whether to raise the stack overflow exception when growing
* the stack save area.
*/
/* Send everything to home location */
dvmCompilerFlushAllRegs(cUnit);
/* oldStackSave = r5FP + sizeof(current frame) */
opRegRegImm(cUnit, kOpAdd, oldStackSave, r5FP,
cUnit->method->registersSize * 4);
/* oldFP = oldStackSave + sizeof(stackSaveArea) */
opRegRegImm(cUnit, kOpAdd, oldFP, oldStackSave, sizeof(StackSaveArea));
/* newStackSave = r5FP - sizeof(StackSaveArea) */
opRegRegImm(cUnit, kOpSub, newStackSave, r5FP, sizeof(StackSaveArea));
loadWordDisp(cUnit, r13sp, 0, savedPC);
loadConstant(cUnit, currentPC, (int) (cUnit->method->insns + mir->offset));
loadConstant(cUnit, method, (int) cUnit->method);
loadConstant(cUnit, pDvmDex, (int) cUnit->method->clazz->pDvmDex);
#ifdef EASY_GDB
/* newStackSave->prevSave = oldStackSave */
storeWordDisp(cUnit, newStackSave, offsetof(StackSaveArea, prevSave),
oldStackSave);
#endif
/* newStackSave->prevSave = oldStackSave */
storeWordDisp(cUnit, newStackSave, offsetof(StackSaveArea, prevFrame),
oldFP);
/* newStackSave->savedPc = savedPC */
storeWordDisp(cUnit, newStackSave, offsetof(StackSaveArea, savedPc),
savedPC);
/* return address */
loadConstant(cUnit, returnAddr, 0);
storeWordDisp(cUnit, newStackSave, offsetof(StackSaveArea, returnAddr),
returnAddr);
/* newStackSave->method = method */
storeWordDisp(cUnit, newStackSave, offsetof(StackSaveArea, method), method);
/* thread->method = method */
storeWordDisp(cUnit, r6SELF, offsetof(InterpSaveState, method), method);
/* thread->interpSave.curFrame = current FP */
storeWordDisp(cUnit, r6SELF, offsetof(Thread, interpSave.curFrame), r5FP);
/* thread->methodClassDex = pDvmDex */
storeWordDisp(cUnit, r6SELF, offsetof(InterpSaveState, methodClassDex),
pDvmDex);
/* Restore the stack pointer */
opRegImm(cUnit, kOpAdd, r13sp, 16);
genPuntToInterp(cUnit, mir->offset);
}
static void genInterpSingleStep(CompilationUnit *cUnit, MIR *mir)
{
int flags = dexGetFlagsFromOpcode(mir->dalvikInsn.opcode);
int flagsToCheck = kInstrCanBranch | kInstrCanSwitch | kInstrCanReturn |
kInstrCanThrow;
//If already optimized out, just ignore
if (mir->dalvikInsn.opcode == OP_NOP)
return;
//Ugly, but necessary. Flush all Dalvik regs so Interp can find them
dvmCompilerFlushAllRegs(cUnit);
if ((mir->next == NULL) || (flags & flagsToCheck)) {
genPuntToInterp(cUnit, mir->offset);
return;
}
int entryAddr = offsetof(Thread,
jitToInterpEntries.dvmJitToInterpSingleStep);
loadWordDisp(cUnit, rEBP, 0, rECX); // Get glue
loadWordDisp(cUnit, rECX, entryAddr, rEAX); // rEAX<- entry address
/* rPC = dalvik pc */
loadConstant(cUnit, rPC, (int) (cUnit->method->insns + mir->offset));
/* rECX = dalvik pc of following instruction */
loadConstant(cUnit, rECX, (int) (cUnit->method->insns + mir->next->offset));
/* Pass on the stack */
storeWordDisp(cUnit, rESP, OUT_ARG0, rECX);
opReg(cUnit, kOpCall, rEAX);
}
static bool genInlinedAbsDouble(CompilationUnit *cUnit, MIR *mir)
{
int offset = offsetof(InterpState, retval);
RegLocation rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
RegLocation regSrc = loadValueWide(cUnit, rlSrc, kCoreReg);
int reglo = regSrc.lowReg;
int reghi = regSrc.highReg;
int signMask = dvmCompilerAllocTemp(cUnit);
loadConstant(cUnit, signMask, 0x7fffffff);
storeWordDisp(cUnit, rGLUE, offset, reglo);
newLIR2(cUnit, kThumbAndRR, reghi, signMask);
dvmCompilerFreeTemp(cUnit, signMask);
storeWordDisp(cUnit, rGLUE, offset + 4, reghi);
//TUNING: rewrite this to not clobber
dvmCompilerClobber(cUnit, reghi);
return true;
}
/*
* For monitor unlock, we don't have to use ldrex/strex. Once
* we've determined that the lock is thin and that we own it with
* a zero recursion count, it's safe to punch it back to the
* initial, unlock thin state with a store word.
*/
static void genMonitorExit(CompilationUnit *cUnit, MIR *mir)
{
RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
ArmLIR *target;
ArmLIR *branch;
ArmLIR *hopTarget;
ArmLIR *hopBranch;
assert(LW_SHAPE_THIN == 0);
loadValueDirectFixed(cUnit, rlSrc, r1); // Get obj
dvmCompilerLockAllTemps(cUnit); // Prepare for explicit register usage
dvmCompilerFreeTemp(cUnit, r4PC); // Free up r4 for general use
genNullCheck(cUnit, rlSrc.sRegLow, r1, mir->offset, NULL);
loadWordDisp(cUnit, r1, offsetof(Object, lock), r2); // Get object->lock
loadWordDisp(cUnit, r6SELF, offsetof(Thread, threadId), r3); // Get threadId
// Is lock unheld on lock or held by us (==threadId) on unlock?
opRegRegImm(cUnit, kOpAnd, r7, r2,
(LW_HASH_STATE_MASK << LW_HASH_STATE_SHIFT));
opRegImm(cUnit, kOpLsl, r3, LW_LOCK_OWNER_SHIFT); // Align owner
newLIR3(cUnit, kThumb2Bfc, r2, LW_HASH_STATE_SHIFT,
LW_LOCK_OWNER_SHIFT - 1);
opRegReg(cUnit, kOpSub, r2, r3);
hopBranch = opCondBranch(cUnit, kArmCondNe);
dvmCompilerGenMemBarrier(cUnit, kSY);
storeWordDisp(cUnit, r1, offsetof(Object, lock), r7);
branch = opNone(cUnit, kOpUncondBr);
hopTarget = newLIR0(cUnit, kArmPseudoTargetLabel);
hopTarget->defMask = ENCODE_ALL;
hopBranch->generic.target = (LIR *)hopTarget;
// Export PC (part 1)
loadConstant(cUnit, r3, (int) (cUnit->method->insns + mir->offset));
LOAD_FUNC_ADDR(cUnit, r7, (int)dvmUnlockObject);
genRegCopy(cUnit, r0, r6SELF);
// Export PC (part 2)
newLIR3(cUnit, kThumb2StrRRI8Predec, r3, r5FP,
sizeof(StackSaveArea) -
offsetof(StackSaveArea, xtra.currentPc));
opReg(cUnit, kOpBlx, r7);
/* Did we throw? */
ArmLIR *branchOver = genCmpImmBranch(cUnit, kArmCondNe, r0, 0);
loadConstant(cUnit, r0,
(int) (cUnit->method->insns + mir->offset +
dexGetWidthFromOpcode(OP_MONITOR_EXIT)));
genDispatchToHandler(cUnit, TEMPLATE_THROW_EXCEPTION_COMMON);
// Resume here
target = newLIR0(cUnit, kArmPseudoTargetLabel);
target->defMask = ENCODE_ALL;
branch->generic.target = (LIR *)target;
branchOver->generic.target = (LIR *) target;
}
/* Export the Dalvik PC assicated with an instruction to the StackSave area */
static ArmLIR *genExportPC(CompilationUnit *cUnit, MIR *mir)
{
ArmLIR *res;
int rDPC = dvmCompilerAllocTemp(cUnit);
int rAddr = dvmCompilerAllocTemp(cUnit);
int offset = offsetof(StackSaveArea, xtra.currentPc);
res = loadConstant(cUnit, rDPC, (int) (cUnit->method->insns + mir->offset));
newLIR2(cUnit, kThumbMovRR, rAddr, rFP);
newLIR2(cUnit, kThumbSubRI8, rAddr, sizeof(StackSaveArea) - offset);
storeWordDisp( cUnit, rAddr, 0, rDPC);
return res;
}
static bool genInlinedAbsFloat(CompilationUnit *cUnit, MIR *mir)
{
int offset = offsetof(Thread, interpSave.retval);
RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
int reg0 = loadValue(cUnit, rlSrc, kCoreReg).lowReg;
int signMask = dvmCompilerAllocTemp(cUnit);
loadConstant(cUnit, signMask, 0x7fffffff);
newLIR2(cUnit, kThumbAndRR, reg0, signMask);
dvmCompilerFreeTemp(cUnit, signMask);
storeWordDisp(cUnit, r6SELF, offset, reg0);
//TUNING: rewrite this to not clobber
dvmCompilerClobber(cUnit, reg0);
return false;
}
