Esempio n. 1
0
/**
 * \brief Run tests and turn on power to simulated oven plate
 *
 * This functions runs some class B tests, reinitializes Timer/Counters, ADC and
 * DAC used by the oven, then turns on and starts monitoring of periodic tests.
 */
static void ovenctl_turn_on_plate(void)
{
	/* Store current DAC value since the analog IO test is destructive */
	uint16_t dac_val = DACB.CH0DATA;

	/* Run tests -- classb_error is updated if any of them fail */
	oven_classb_run_tests();

	/* Initialize the ADC and DAC modules, as well as the Timer/Counters
	 * we use to emulate real world application.
	 */
	main_init_adc_dac();
	DACB.CH0DATA = dac_val;
	main_init_tc();

	/* Enable and set up timer for periodic temperature checking */
	tc_enable(&OVEN_PERIODIC_TEMPTEST_TC);
	/* Set timer to overflow every 600ms: 24MHz / (1024 * 14063) = 0.6s */
	tc_write_clock_source(&OVEN_PERIODIC_TEMPTEST_TC, TC_CLKSEL_DIV1024_gc);
	tc_write_period(&OVEN_PERIODIC_TEMPTEST_TC, 14062);

	/* Set up temperature check as interrupt callback function, then enable
	 * interrupts
	 */
	tc_set_overflow_interrupt_callback(&OVEN_PERIODIC_TEMPTEST_TC,
			ovenctl_periodic_temperature_sanity_check);
	tc_set_overflow_interrupt_level(&OVEN_PERIODIC_TEMPTEST_TC,
			TC_OVFINTLVL_LO_gc);

	/* Enable monitoring of the periodic temperature check */
	classb_intmon_set_state(TEMP_SANITY_TEST, M_ENABLE);

	/* Enable and set up timer for periodic execution of Class B tests */
	tc_enable(&OVEN_PERIODIC_CLASSB_TC);
	/* Set timer to overflow every second: 24MHz / (1024 * 23438) = 1s */
	tc_write_clock_source(&OVEN_PERIODIC_CLASSB_TC, TC_CLKSEL_DIV1024_gc);
	tc_write_period(&OVEN_PERIODIC_CLASSB_TC, 23437);
	/* Set up periodic class B test as interrupt callback function, then
	 * enable interrupts
	 */
	tc_set_overflow_interrupt_callback(&OVEN_PERIODIC_CLASSB_TC,
			ovenctl_periodic_classb_tests);
	tc_set_overflow_interrupt_level(&OVEN_PERIODIC_CLASSB_TC,
			TC_OVFINTLVL_LO_gc);

	/* Enable monitoring of the periodic temperature check */
	classb_intmon_set_state(PER_CLASSB_TESTS, M_ENABLE);
}
Esempio n. 2
0
/**
 * \brief Initialize Class B tests
 *
 * Set up timers, timer callbacks, initialize interrupt monitor,
 * add interrupts to be monitored.
 */
void oven_classb_init_tests(void)
{
	/* == Frequency consistency test == */

	/* Use Timer D1 for frequency consistency test */
	tc_enable(&CLASSB_FREQTEST_TC);
	tc_set_overflow_interrupt_callback(&CLASSB_FREQTEST_TC,
			classb_freq_tc_callback);
	classb_freq_setup_timer();

	/* == Frequency consistency test and interrupt monitor timer == */

	/* Use relative RTC interrupt from ASF to execute periodic check for
	 * frequency consistency and interrupt monitor.
	 */
	rtc_set_alarm_relative(CLASSB_RTC_INT_PERIOD);
	rtc_set_callback(classb_rtc_callback);
	/* TODO: Workaround: RTC32_COMPINTLVL is reset to OFF for some reason */
	/* after set_alarm_relative is called the the first time. Set to LO. */
	RTC32.INTCTRL = RTC32_COMPINTLVL_LO_gc;

	/* == Interrupt monitor test == */

	/* Register the periodic temperature measurement sanity test in the
	 * monitor.
	 * It's run every 600ms => 3.41 times per RTC compare period of 2 secs.
	 * 25% tolerance.
	 */
	classb_intmon_reg_int(TEMP_SANITY_TEST, 4, 25);
	/* Register the periodic classb test execution in the monitor.
	 * It's run every 1000ms => 2 times per RTC compare period of 2 secs.
	 * 50% tolerance.
	 */
	classb_intmon_reg_int(PER_CLASSB_TESTS, 2, 50);
}
void generator_qenc_enable(PORT_t *port, uint8_t pins_base,
		volatile void *timer, uint8_t revolution, uint32_t freq, bool dir )
{
#if XMEGA_E
	Assert((TC4_t *)timer == &TCC4);
#endif

	/* Store parameter in static global variable */
	generator_qenc_port = port;
	generator_qenc_pins_base = pins_base;
	generator_qenc_revolution = revolution;
	generator_qenc_timer = timer;

	/* Clear all pins on test port */
	port->DIRSET = QENC_PH0_PH90_INDEX_PINS << generator_qenc_pins_base;
	port->OUTCLR = QENC_PH0_PH90_INDEX_PINS << generator_qenc_pins_base;

	tc_enable(timer);
	tc_set_wgm(timer, TC_WG_NORMAL);

	generator_qenc_set_freq(freq);
	generator_qenc_set_direction(dir);

	/* Enable low level interrupt on CCA */
	tc_set_overflow_interrupt_level(timer, TC_INT_LVL_LO);

	/* Set interrupt callback function for CCA */
	tc_set_overflow_interrupt_callback(timer,
			generator_qenc_timer_ccaint_handler);
}
Esempio n. 4
0
/*! \brief  to initialiaze hw timer
 */
uint8_t tmr_init(void)
{
	uint8_t timer_multiplier;

	tc_enable(TIMER);

	tc_set_overflow_interrupt_callback(TIMER,
			(tc_callback_t)tc_ovf_callback);

	/*initialize timer in waveform generator - Normal mode */
	tc_set_wgm(TIMER, TC_WG_NORMAL);

	tc_write_period(TIMER, TIMER_PERIOD);
	/* select clock division as 1 */
	tc_write_clock_source(TIMER, TC_CLKSEL_DIV1_gc);

	tc_set_overflow_interrupt_level(TIMER, TC_INT_LVL_HI);

	tc_set_cca_interrupt_callback(TIMER, (tc_callback_t)tc_cca_callback);

	tc_enable_cc_channels(TIMER, TC_CCAEN);

	tc_set_cca_interrupt_level(TIMER, TC_INT_LVL_OFF);

	/* calculate how faster the timer with current clk freq compared to
	 * timer with 1Mhz */
	timer_multiplier = sysclk_get_peripheral_bus_hz(TIMER) / DEF_1MHZ;

	return timer_multiplier;
}
int main(void)
{
	pmic_init();
	board_init();
	sysclk_init();
	sleepmgr_init();

	cpu_irq_enable();

#if (BOARD == XMEGA_A3BU_XPLAINED)
	/* The status LED must be used as LED2, so we turn off
	 * the green led which is in the same packaging. */
	ioport_set_pin_high(LED3_GPIO);
#endif

	/*
	* Unmask clock for TIMER_EXAMPLE
	*/
	tc_enable(&TIMER_EXAMPLE);

	/*
	* Configure interrupts callback functions for TIMER_EXAMPLE
	* overflow interrupt, CCA interrupt and CCB interrupt
	*/
	tc_set_overflow_interrupt_callback(&TIMER_EXAMPLE,
			example_ovf_interrupt_callback);
	tc_set_cca_interrupt_callback(&TIMER_EXAMPLE,
			example_cca_interrupt_callback);
	tc_set_ccb_interrupt_callback(&TIMER_EXAMPLE,
			example_ccb_interrupt_callback);

	/*
	* Configure TC in normal mode, configure period, CCA and CCB
	* Enable both CCA and CCB channels
	*/

	tc_set_wgm(&TIMER_EXAMPLE, TC_WG_NORMAL);
	tc_write_period(&TIMER_EXAMPLE, TIMER_EXAMPLE_PERIOD);
	tc_write_cc(&TIMER_EXAMPLE, TC_CCA, TIMER_EXAMPLE_PERIOD / 2);
	tc_write_cc(&TIMER_EXAMPLE, TC_CCB, TIMER_EXAMPLE_PERIOD / 4);
	tc_enable_cc_channels(&TIMER_EXAMPLE,(enum tc_cc_channel_mask_enable_t)(TC_CCAEN | TC_CCBEN));

	/*
	* Enable TC interrupts (overflow, CCA and CCB)
	*/
	tc_set_overflow_interrupt_level(&TIMER_EXAMPLE, TC_INT_LVL_LO);
	tc_set_cca_interrupt_level(&TIMER_EXAMPLE, TC_INT_LVL_LO);
	tc_set_ccb_interrupt_level(&TIMER_EXAMPLE, TC_INT_LVL_LO);

	/*
	* Run TIMER_EXAMPLE at TIMER_EXAMPLE_PERIOD(31250Hz) resolution
	*/
	tc_set_resolution(&TIMER_EXAMPLE, TIMER_EXAMPLE_PERIOD);

	do {
		/* Go to sleep, everything is handled by interrupts. */
		sleepmgr_enter_sleep();
	} while (1);
}
Esempio n. 6
0
/**
 * Initialize trace
 */
void hf_trace_init() {
    tc_enable(&TCC0);
    tc_set_overflow_interrupt_callback(&TCC0, tc_wrap);
    tc_set_wgm(&TCC0, TC_WG_NORMAL);
    tc_write_period(&TCC0, 65535);
    tc_set_overflow_interrupt_level(&TCC0, TC_INT_LVL_LO);
    tc_write_clock_source(&TCC0, TC_CLKSEL_DIV8_gc);
}
Esempio n. 7
0
/**
 * \brief Configure timer interrupts for touch measurements
 */
static void touch_init_timer_isr(void)
{
	tc_enable(&TOUCH_TC);
	tc_set_overflow_interrupt_callback(&TOUCH_TC, &touch_timer_period_handler);
	tc_set_resolution(&TOUCH_TC, (uint32_t)1000000);
	tc_write_period(&TOUCH_TC, (tc_get_resolution(&TOUCH_TC)
			* TOUCH_TC_PERIOD_MS) / 1000);
	tc_set_overflow_interrupt_level(&TOUCH_TC, TC_INT_LVL_LO);
}
Esempio n. 8
0
void XBee_Init()
{
	tc_enable(&(XBEE_TIMER)); // timer used for callback functionality
	tc_set_overflow_interrupt_callback(&(XBEE_TIMER), SendTelemetry); // sets up a function to callback when it's time to run
	tc_set_wgm(&(XBEE_TIMER), TC_WG_NORMAL); // sets the waveform generation
	tc_write_period(&(XBEE_TIMER), XBEE_HZ);  // this should run at 2 HZ
	tc_set_overflow_interrupt_level(&(XBEE_TIMER), TC_INT_LVL_MED); // low priority 0x01
	tc_write_clock_source(&(XBEE_TIMER), TC_CLKSEL_DIV1024_gc); // set clock prescaler to 1024
}
Esempio n. 9
0
void init_MS5611_callback()
{
	tc_enable(&(MS5611_TIMER)); // timer used for callback functionality
	tc_set_overflow_interrupt_callback(&(MS5611_TIMER), ms5611_altitude); // sets up a function to callback when it's time to run
	tc_set_wgm(&(MS5611_TIMER), TC_WG_NORMAL); // sets the waveform generation
	tc_write_period(&(MS5611_TIMER), MS5611_HZ);
	tc_set_overflow_interrupt_level(&(MS5611_TIMER), TC_INT_LVL_LO); // medium priority 0x02
	tc_write_clock_source(&(MS5611_TIMER), TC_CLKSEL_DIV1024_gc); // set clock prescaler to 1024
}
Esempio n. 10
0
int main (void)
{
	board_init();

	uint32_t clk = F_CPU/SAMPLERATE/OVERSAMPLING/CHANNELS;
	tc_set_resolution(&TCC1,clk);
	tc_set_overflow_interrupt_callback(&TCC1, HFSampleLoop);
	while(1)
	{
		// check for data to show
	}
}
Esempio n. 11
0
/** 
 * \brief This function initializes a delay timer.
 */
void sha204h_timer_init(void)
{
	// Enable timer.
	tc_enable(DELAY_COUNTER);
	
	// Enable overflow interrupt
	tc_set_overflow_interrupt_level(DELAY_COUNTER, PMIC_LVL_LOW);
	
	// Configure TC in normal mode
	tc_set_wgm(DELAY_COUNTER, TC_WG_NORMAL);
	
	// Set call back function for timer interrupt.
	tc_set_overflow_interrupt_callback(DELAY_COUNTER, sha204h_timer_overflow_interrupt_callback);
}
Esempio n. 12
0
/*! \brief  to initialiaze hw timer
 */
uint8_t tmr_init(void)
{
	uint8_t timer_multiplier;

	tc_enable(TIMER);

	tc_set_overflow_interrupt_callback(TIMER, tc_ovf_callback);

	tc_set_mode(TIMER, NORMAL);

	tc_enable_ovf_int(TIMER);

	configure_tc_callback(TIMER);

	tc_disable_compa_int(TIMER);

	tc_write_clock_source(TIMER, TC_CLKSEL_DIV1_gc);

	timer_multiplier = sysclk_get_peripheral_bus_hz(TIMER) / DEF_1MHZ;

	return timer_multiplier;
}
Esempio n. 13
0
int main (void)
{
	sysclk_init();
	board_init();
	pmic_init();
	gfx_mono_init();
	adc_sensors_init();
	// Enable display backlight
	gpio_set_pin_high(NHD_C12832A1Z_BACKLIGHT);
	cpu_irq_enable();
	
	while(true){
		
		if(state==1){
			start_game();
			}else if(state==2){
			tc_enable(&TCC0);
			tc_set_overflow_interrupt_callback(&TCC0, sun_count);
			tc_set_wgm(&TCC0, TC_WG_NORMAL);
			tc_write_period(&TCC0, 13500);
			tc_set_overflow_interrupt_level(&TCC0, TC_INT_LVL_LO);
			tc_write_clock_source(&TCC0, TC_CLKSEL_DIV256_gc);
			
			tc_enable(&TCC1);
			tc_set_overflow_interrupt_callback(&TCC1, button_press);
			tc_set_wgm(&TCC1, TC_WG_NORMAL);
			tc_write_period(&TCC1, 62500);
			tc_set_overflow_interrupt_level(&TCC1, TC_INT_LVL_LO);
			tc_write_clock_source(&TCC1, TC_CLKSEL_DIV8_gc);
			
			gfx_mono_draw_string("SUN:   0", 0, 0, &sysfont);
			gfx_mono_draw_string(">", 0, cursor_position, &sysfont);
			gfx_mono_draw_string("Score:  0", 63, 0, &sysfont);
			
			randomPeta();
			
			char* score_string = NULL;
			uint16_t old_score = 0;
			
			for(j = 0; j <= 70; j++){
				
				if(sun_value > 10){
					
					lightsensor_measure();
					while (!lightsensor_data_is_ready()) {
						// Wait until the conversion is complete
					}
					if(lightsensor_get_raw_value() > 250){
						sun_value -= 10;
						sunBurst();
						gfx_mono_draw_filled_rect(12,8,114,24,GFX_PIXEL_CLR);
					}
				}
				

				if(score > old_score){
					sprintf(score_string, "%3d", score);
					gfx_mono_draw_string(score_string, 100, 0, &sysfont);
					old_score = score;
				}
				
				if(lose){
					state=3;
					break;
					}else if(zombie==0){
					state=4;
					break;
				}
				
				
				tampilkanPeta();
				tampilkanTembak();
				delay_ms(1000);
			}
			}else if(state==3){
			cpu_irq_disable();
			gfx_mono_draw_filled_rect(0,0,128,32,GFX_PIXEL_CLR);
			while(true){
				gfx_mono_draw_string("GAME OVER",36,8,&sysfont)	;
				gfx_mono_draw_string("You Lose",39,20,&sysfont)	;
			}
			}else if(state==4){
			cpu_irq_disable();
			gfx_mono_draw_filled_rect(0,0,128,32,GFX_PIXEL_CLR);
			while(true){
				gfx_mono_draw_string("GAME OVER",36,2,&sysfont)	;
				gfx_mono_draw_string("You Win",42,12,&sysfont)	;
				gfx_mono_draw_string("Score = ",30,22,&sysfont)	;
				char* score_string = NULL;
				sprintf(score_string, "%3d", score);
				gfx_mono_draw_string(score_string, 79, 22, &sysfont);
			}
		}
	}
	
}
Esempio n. 14
0
/**
 * \brief Test read from fixed location, trigger from timer and callback
 *
 * \note This test sets up a timer to trigger the DMA module,
 * which in turn reads the timer_overflow_counter variable and writes
 * it to memory sequentially. It then checks to see that the memory block
 * written is sequential according to the overflow count.
 *
 * \param test              Current test
 */
static void run_dma_triggered_with_callback(const struct test_case *test)
{
	struct dma_channel_config config_params;
	bool success;

	/* Null the buffer */
	set_buffer(dest_block_tc, 0x0000);

	/* Null out the config parameter struct */
	memset(&config_params, 0, sizeof(config_params));

	/*
	 * Enable the timer, and set it to count up.
	 * When it overflows, it triggers the DMA to
	 * read timer_overflow_counter. */
	tc_enable(&TIMER);

	tc_set_direction(&TIMER, TC_UP);
	tc_write_period(&TIMER, TIMER_PERIOD);

	tc_set_resolution(&TIMER, TIMER_RESOLUTION);

	tc_set_overflow_interrupt_level(&TIMER, PMIC_LVL_LOW);
	tc_set_overflow_interrupt_callback(&TIMER, timer_overflow_callback);

	/* Enable the DMA module */
	dma_enable();

	/* Set callback for transfer done */
	dma_set_callback(DMA_CHANNEL_0, dma_transfer_is_complete);

	/* Set low interrupt level */
	dma_channel_set_interrupt_level(&config_params, PMIC_LVL_LOW);

	/* Set up the DMA to read the timer value
	 *
	 * - Single shot transfer mode
	 * - Two byte (16-bit) burst length
	 * - Increment on source and destination
	 * - Reload on burst for source
	 * - No reload for destination
	 */
	dma_channel_set_single_shot(&config_params);
	dma_channel_set_burst_length(&config_params,
			DMA_CH_BURSTLEN_1BYTE_gc);
	dma_channel_set_src_reload_mode(&config_params,
			DMA_CH_SRCRELOAD_BURST_gc);
	dma_channel_set_src_dir_mode(&config_params,
			DMA_CH_SRCDIR_FIXED_gc);
	dma_channel_set_dest_reload_mode(&config_params,
			DMA_CH_DESTRELOAD_NONE_gc);
	dma_channel_set_dest_dir_mode(&config_params,
			DMA_CH_DESTDIR_INC_gc);

	/* Set trigger source to TCC0's overflow */
	dma_channel_set_trigger_source(&config_params,
			DMA_CH_TRIGSRC_TCC0_OVF_gc);

	/* Transfer DEST_BLOCK_TC_SIZE bytes */
	dma_channel_set_transfer_count(&config_params,
			DEST_BLOCK_TC_SIZE);

	/* Set address */
	dma_channel_set_source_address(&config_params,
			(uint16_t)(uintptr_t)&timer_overflow_counter);
	dma_channel_set_destination_address(&config_params,
			(uint16_t)(uintptr_t)dest_block_tc);

	/* Reset the channel */
	dma_channel_reset(DMA_CHANNEL_0);

	/* Write the config */
	dma_channel_write_config(DMA_CHANNEL_0, &config_params);

	/* Enable the channel */
	dma_channel_enable(DMA_CHANNEL_0);

	/* Wait for transfer to finish */
	while (!dma_has_completed) {
		/* Intentionally left empty */
	}

	/* Disable DMA */
	dma_disable();

	/* Verify that the result is as expected */
	success = block_compare(dest_block_tc,
			expected_result_tc, DEST_BLOCK_TC_SIZE);

	test_assert_true(test, success, "Result is not as expected");
}