int main(void)
{
pmic_init();
board_init();
sysclk_init();
sleepmgr_init();
cpu_irq_enable();
#if (BOARD == XMEGA_A3BU_XPLAINED)
/* The status LED must be used as LED2, so we turn off
* the green led which is in the same packaging. */
ioport_set_pin_high(LED3_GPIO);
#endif
/*
* Unmask clock for TIMER_EXAMPLE
*/
tc_enable(&TIMER_EXAMPLE);
/*
* Configure interrupts callback functions for TIMER_EXAMPLE
* overflow interrupt, CCA interrupt and CCB interrupt
*/
tc_set_overflow_interrupt_callback(&TIMER_EXAMPLE,
example_ovf_interrupt_callback);
tc_set_cca_interrupt_callback(&TIMER_EXAMPLE,
example_cca_interrupt_callback);
tc_set_ccb_interrupt_callback(&TIMER_EXAMPLE,
example_ccb_interrupt_callback);
/*
* Configure TC in normal mode, configure period, CCA and CCB
* Enable both CCA and CCB channels
*/
tc_set_wgm(&TIMER_EXAMPLE, TC_WG_NORMAL);
tc_write_period(&TIMER_EXAMPLE, TIMER_EXAMPLE_PERIOD);
tc_write_cc(&TIMER_EXAMPLE, TC_CCA, TIMER_EXAMPLE_PERIOD / 2);
tc_write_cc(&TIMER_EXAMPLE, TC_CCB, TIMER_EXAMPLE_PERIOD / 4);
tc_enable_cc_channels(&TIMER_EXAMPLE,(enum tc_cc_channel_mask_enable_t)(TC_CCAEN | TC_CCBEN));
/*
* Enable TC interrupts (overflow, CCA and CCB)
*/
tc_set_overflow_interrupt_level(&TIMER_EXAMPLE, TC_INT_LVL_LO);
tc_set_cca_interrupt_level(&TIMER_EXAMPLE, TC_INT_LVL_LO);
tc_set_ccb_interrupt_level(&TIMER_EXAMPLE, TC_INT_LVL_LO);
/*
* Run TIMER_EXAMPLE at TIMER_EXAMPLE_PERIOD(31250Hz) resolution
*/
tc_set_resolution(&TIMER_EXAMPLE, TIMER_EXAMPLE_PERIOD);
do {
/* Go to sleep, everything is handled by interrupts. */
sleepmgr_enter_sleep();
} while (1);
}
int main(void)
{
pmic_init();
board_init();
sysclk_init();
sleepmgr_init();
cpu_irq_enable();
/* Enables the Timer defined in conf_example.h : TCE0 in this example */
tc_enable(&TIMER_EXAMPLE);
/* Configures the interrupt level of CCA and CCB modules : low */
tc_set_cca_interrupt_level(&TIMER_EXAMPLE, TC_INT_LVL_LO);
tc_set_ccb_interrupt_level(&TIMER_EXAMPLE, TC_INT_LVL_LO);
/* Configures the waveform generator of this Timer mode in NORMAL mode */
tc_set_wgm(&TIMER_EXAMPLE, TC_WG_NORMAL);
/* Declares the interrupt functions which will be called when CCA and CCB
interrupts will occur */
tc_set_cca_interrupt_callback(&TIMER_EXAMPLE,
example_cca_interrupt_callback);
tc_set_ccb_interrupt_callback(&TIMER_EXAMPLE,
example_ccb_interrupt_callback);
/* Configures the Timer period*/
tc_write_period(&TIMER_EXAMPLE, TIMER_EXAMPLE_PERIOD);
/* Configures the CCA and CCB levels*/
tc_write_cc(&TIMER_EXAMPLE, TC_CCA, TIMER_EXAMPLE_PERIOD/2);
tc_write_cc(&TIMER_EXAMPLE, TC_CCB, TIMER_EXAMPLE_PERIOD/2);
/* Enables the CCA and CCB channels*/
tc_enable_cc_channels(&TIMER_EXAMPLE,TC_CCAEN);
tc_enable_cc_channels(&TIMER_EXAMPLE,TC_CCAEN);
/* Configures the waveform genertaor in Dual Slope mode and Top*/
tc_set_wgm(&TIMER_EXAMPLE,TC_WG_DS_T);
/* Enables and configures the deadtime of CCA and CCB outputs*/
tc_awex_enable_cca_deadtime(&AWEXE);
tc_awex_enable_ccb_deadtime(&AWEXE);
tc_awex_set_dti_high(&AWEXE, TIMER_EXAMPLE_PERIOD/6);
tc_awex_set_dti_low(&AWEXE, TIMER_EXAMPLE_PERIOD/6);
/* Outputs CCA and CCB on Port E0 and E1*/
tc_awex_set_output_override(&AWEXE, 0x03);
tc_set_resolution(&TIMER_EXAMPLE, 10000);
do {
/* Go to sleep, everything is handled by interrupts. */
sleepmgr_enter_sleep();
} while (1);
}
/**
* \b avrInitSystemTickTimer
*
* Initialise the system tick timer. Uses the AVR's timer1 facility.
*
* @return None
*/
void avrInitSystemTickTimer ( void )
{
/*
* Unmask clock for TCC1
*/
tc_enable(&TCC1);
/*
* Configure interrupts callback functions for CCA interrupt
*/
tc_set_cca_interrupt_callback(&TCC1,
cca_interrupt_callback);
/*
* Configure TC in normal mode, configure period, CCA
* Enable CCA channel
*/
tc_set_wgm(&TCC1, TC_WG_NORMAL);
tc_write_period(&TCC1, AVR_CPU_HZ / 256 / SYSTEM_TICKS_PER_SEC);
tc_write_cc(&TCC1, TC_CCA, AVR_CPU_HZ / 256 / SYSTEM_TICKS_PER_SEC / 2);
tc_enable_cc_channels(&TCC1,(enum tc_cc_channel_mask_enable_t)(TC_CCAEN));
/*
* Enable TC interrupts (overflow, CCA and CCB)
*/
tc_set_cca_interrupt_level(&TCC1, TC_CCAINTLVL_LO_gc);
/*
* Run TCC1 at AVR_CPU_HZ / 256
*/
tc_write_clock_source(&TCC1, TC_CLKSEL_DIV256_gc);
}
/**
* \brief The PWM signal starts toggling
*/
void PWM_start_toggle(void) {
uint16_t ra, rc;
/** Configure the PMC to enable the Timer/Counter (TC) module. */
sysclk_enable_peripheral_clock(EPD_TC_WAVEFORM_ID);
gpio_configure_pin(EPD_TC_WAVEFORM_PIN, EPD_TC_WAVEFORM_PIN_FLAGS);
/** TC Configuration structure. */
struct tc_control_reg tc_control_par = {
/** TC Compare Output Mode */
.co_mode = CO_SET,
/** TC Waveform Generation Mode */
.wg_mode = PWM_Mode11,
/** TC Clock Selection, Prescalar select */
.cs_select = EPD_TC_ClockSignalSel
};
/** Init TC to waveform mode. */
tc_initc(EPD_TC_WAVEFORM_ID, EPD_TC_WAVEFORM_CHANNEL, &tc_control_par);
/** Configure waveform frequency and duty cycle. */
rc = (sysclk_get_peripheral_bus_hz(EPD_TC_TIMER_ID) /
EPD_TC_ClockSignalSel) /
EPD_TC_WAVEFORM_PWM_FREQUENCY;
tc_clear_ic(EPD_TC_WAVEFORM_ID, EPD_TC_WAVEFORM_CHANNEL, 0);
tc_write_ic(EPD_TC_WAVEFORM_ID, EPD_TC_WAVEFORM_CHANNEL, rc);
ra = (100 - EPD_TC_WAVEFORM_PWM_DUTY_CYCLE) * rc / 100;
tc_clear_cc(EPD_TC_WAVEFORM_ID, EPD_TC_WAVEFORM_CHANNEL, 0);
tc_write_cc(EPD_TC_WAVEFORM_ID, EPD_TC_WAVEFORM_CHANNEL, ra);
/** Enable TC EPD_TC_WAVEFORM_CHANNEL. */
tc_start(EPD_TC_WAVEFORM_ID, &tc_control_par);
}
void TimerC0_init(void)
{
tc_write_clock_source(&TCC0,TC_CLKSEL_DIV64_gc);//1
tc_set_wgm(&TCC0,TC_WG_SS);
tc_write_period(&TCC0,0x77);//0x01DFF
tc_set_direction(&TCC0,TC_UP);
tc_enable_cc_channels(&TCC0,TC_CCAEN);
tc_enable_cc_channels(&TCC0,TC_CCBEN);
tc_enable(&TCC0);
tc_write_cc(&TCC0,TC_CCA,0x5D);
};
/**
* \brief Initialize Timer/Counters used to simulate oven actuation signal
*
* TCC0 is set up to generate a dual variable frequency signal with dead-time
* insertion using the AWEX module. This is similar to how heating elements are
* actuated in real induction ovens. Its output is on pin C2 which is marked as
* RXD on header J1.
*
* TCC1 is set up to capture a frequency signal via a pin change event using the
* XMEGA Event System. Its input is pin C4 which is marked as SS on header J1.
*/
void main_init_tc(void)
{
/* Set up timer for PWM output, used to actuate cooking element */
tc_enable(&OVEN_FREQ_TC);
/* Configures the waveform generator in Frequency generation mode */
tc_set_wgm(&OVEN_FREQ_TC, TC_WG_FRQ);
/* Configures the CCA level. This controls frequency generation */
tc_write_cc(&OVEN_FREQ_TC, TC_CCA, FREQ_TIMER_PERIOD_INIT / 2);
/* Enables and configures the deadtime of AWEX channel B outputs */
tc_awex_enable_ccb_deadtime(&AWEXC);
tc_awex_set_dti_high(&AWEXC, FREQ_TIMER_PERIOD_INIT / 4);
tc_awex_set_dti_low(&AWEXC, FREQ_TIMER_PERIOD_INIT / 4);
/* Output of AWEX channel B is on pins C2 and C3 */
tc_awex_set_output_override(&AWEXC, 0x0C);
/* Make sure that the output is initially turned off */
tc_write_clock_source(&OVEN_FREQ_TC, TC_CLKSEL_OFF_gc);
/* Set up timer for input capture for the simulation to read "real"
* power
*/
tc_enable(&OVEN_FREQ_CAPT_TC);
/* Select Event Channel 1 as input to the timer, and perform frequency
* capture.
*/
tc_set_input_capture(&OVEN_FREQ_CAPT_TC, TC_EVSEL_CH1_gc,
TC_EVACT_FRQ_gc);
/* Enable Capture Channel A */
tc_enable_cc_channels(&OVEN_FREQ_CAPT_TC, TC_CCAEN);
/* Make sure pin C4 is configured for input and sensing on rise and fall
* and pin C2 is configured for output.
*/
ioport_configure_pin(J1_PIN4, IOPORT_DIR_INPUT | IOPORT_BOTHEDGES);
ioport_configure_pin(J1_PIN2, IOPORT_DIR_OUTPUT);
/* Turn on power to the event system */
PR.PRGEN &= ~PR_EVSYS_bm;
/* Use pin C4 as input to Event Channel 1 */
EVSYS.CH1MUX = EVSYS_CHMUX_PORTC_PIN4_gc;
/* Turn on timer used for input capture */
tc_write_clock_source(&OVEN_FREQ_CAPT_TC, TC_CLKSEL_DIV256_gc);
}
static void initialize_EPD_timer(void) {
uint32_t rc;
/* Configure the PMC to enable the Timer/Counter (TC) module. */
sysclk_enable_peripheral_clock(EPD_TC_TIMER_ID);
/** TC Configuration structure. */
struct tc_control_reg tc_control_par = {
/** TC Compare Output Mode */
.co_mode = CO_NORMAL,
/** TC Waveform Generation Mode */
.wg_mode = CTC_Mode1,
/** TC Clock Selection, Prescalar select */
.cs_select = EPD_TC_ClockSignalSel
};
/** Init TC to timer ctc mode. */
tc_initc(EPD_TC_TIMER_ID, EPD_TC_TIMER_CHANNEL, &tc_control_par);
/** Configure OVF value */
rc = (sysclk_get_peripheral_bus_hz(EPD_TC_TIMER_ID) /
divisors[EPD_TC_ClockSignalSel] ) /
1000 ;
tc_write_cc(EPD_TC_TIMER_ID, EPD_TC_TIMER_CHANNEL, rc);
/** Configure and enable interrupt on TC CTC compare match */
tc_set_compa_interrupt_callback(EPD_TC_TIMER_ID, EPD_timer_handler);
tc_enable_compa_int(EPD_TC_TIMER_ID);
cpu_irq_enable();
tc_start(EPD_TC_TIMER_ID, &tc_control_par);
EPD_Counter=0;
/** Configure the PMC to enable the Timer/Counter (TC) module. */
sysclk_enable_peripheral_clock(EPD_TC_TIMER_ID);
}
/*! \brief to load compare value in channel compare register
*/
void tmr_write_cmpreg(uint16_t compare_value)
{
tc_write_cc(TIMER, TC_COMPA, compare_value);
}
void backlight_set_pwm(uint16_t pwm)
{
tc_write_cc(&BACKLIGHT_TIMER, TC_CCB, pwm);
}
