static void vs_lower_opcode_tgsi_const_gen6(struct vs_compile_context *vcc, struct toy_dst dst, int dim, struct toy_src idx) { const struct toy_dst header = tdst_ud(tdst(TOY_FILE_MRF, vcc->first_free_mrf, 0)); const struct toy_dst block_offsets = tdst_ud(tdst(TOY_FILE_MRF, vcc->first_free_mrf + 1, 0)); const struct toy_src r0 = tsrc_ud(tsrc(TOY_FILE_GRF, 0, 0)); struct toy_compiler *tc = &vcc->tc; unsigned msg_type, msg_ctrl, msg_len; struct toy_inst *inst; struct toy_src desc; if (vs_lower_opcode_tgsi_const_pcb(vcc, dst, dim, idx)) return; /* set message header */ inst = tc_MOV(tc, header, r0); inst->mask_ctrl = GEN6_MASKCTRL_NOMASK; /* set block offsets */ tc_MOV(tc, block_offsets, idx); msg_type = GEN6_MSG_DP_OWORD_DUAL_BLOCK_READ; msg_ctrl = GEN6_MSG_DP_OWORD_DUAL_BLOCK_SIZE_1; msg_len = 2; desc = tsrc_imm_mdesc_data_port(tc, false, msg_len, 1, true, false, msg_type, msg_ctrl, vcc->shader->bt.const_base + dim); tc_SEND(tc, dst, tsrc_from(header), desc, vcc->const_cache); }
static void gs_write_vue(struct gs_compile_context *gcc, struct toy_dst dst, struct toy_src msg_header, const struct toy_src *outs, int num_outs, bool eot) { struct toy_compiler *tc = &gcc->tc; struct toy_dst mrf_header; struct toy_src desc; int sent = 0; mrf_header = tdst_d(tdst(TOY_FILE_MRF, gcc->first_free_mrf, 0)); gs_COPY8(tc, mrf_header, msg_header); while (sent < num_outs) { int mrf = gcc->first_free_mrf + 1; const int mrf_avail = gcc->last_free_mrf - mrf + 1; int msg_len, num_entries, i; bool complete; num_entries = (num_outs - sent + 1) / 2; complete = true; if (num_entries > mrf_avail) { num_entries = mrf_avail; complete = false; } for (i = 0; i < num_entries; i++) { gs_COPY4(tc, tdst(TOY_FILE_MRF, mrf + i / 2, 0), 0, outs[sent + 2 * i], 0); if (sent + i * 2 + 1 < gcc->shader->out.count) { gs_COPY4(tc, tdst(TOY_FILE_MRF, mrf + i / 2, 0), 4, outs[sent + 2 * i + 1], 0); } mrf++; } /* do not forget the header */ msg_len = num_entries + 1; if (complete) { desc = tsrc_imm_mdesc_urb(tc, eot, msg_len, !eot, true, true, !eot, false, sent, 0); } else { desc = tsrc_imm_mdesc_urb(tc, false, msg_len, 0, false, true, false, false, sent, 0); } tc_add2(tc, TOY_OPCODE_URB_WRITE, (complete) ? dst : tdst_null(), tsrc_from(mrf_header), desc); sent += num_entries * 2; } }
static void fs_lower_opcode_kil(struct toy_compiler *tc, struct toy_inst *inst) { struct toy_dst pixel_mask_dst; struct toy_src f0, pixel_mask; struct toy_inst *tmp; /* lower half of r1.7:ud */ pixel_mask_dst = tdst_uw(tdst(TOY_FILE_GRF, 1, 7 * 4)); pixel_mask = tsrc_rect(tsrc_from(pixel_mask_dst), TOY_RECT_010); f0 = tsrc_rect(tsrc_uw(tsrc(TOY_FILE_ARF, BRW_ARF_FLAG, 0)), TOY_RECT_010); /* KILP or KIL */ if (tsrc_is_null(inst->src[0])) { struct toy_src dummy = tsrc_uw(tsrc(TOY_FILE_GRF, 0, 0)); struct toy_dst f0_dst = tdst_uw(tdst(TOY_FILE_ARF, BRW_ARF_FLAG, 0)); /* create a mask that masks out all pixels */ tmp = tc_MOV(tc, f0_dst, tsrc_rect(tsrc_imm_uw(0xffff), TOY_RECT_010)); tmp->exec_size = BRW_EXECUTE_1; tmp->mask_ctrl = BRW_MASK_DISABLE; tc_CMP(tc, tdst_null(), dummy, dummy, BRW_CONDITIONAL_NEQ); /* swapping the two src operands breaks glBitmap()!? */ tmp = tc_AND(tc, pixel_mask_dst, f0, pixel_mask); tmp->exec_size = BRW_EXECUTE_1; tmp->mask_ctrl = BRW_MASK_DISABLE; } else { struct toy_src src[4]; int i; tsrc_transpose(inst->src[0], src); /* mask out killed pixels */ for (i = 0; i < 4; i++) { tc_CMP(tc, tdst_null(), src[i], tsrc_imm_f(0.0f), BRW_CONDITIONAL_GE); /* swapping the two src operands breaks glBitmap()!? */ tmp = tc_AND(tc, pixel_mask_dst, f0, pixel_mask); tmp->exec_size = BRW_EXECUTE_1; tmp->mask_ctrl = BRW_MASK_DISABLE; } } tc_discard_inst(tc, inst); }
static void gs_write_so(struct gs_compile_context *gcc, struct toy_dst dst, struct toy_src index, struct toy_src out, bool send_write_commit_message, int binding_table_index) { struct toy_compiler *tc = &gcc->tc; struct toy_dst mrf_header; struct toy_src desc; mrf_header = tdst_d(tdst(TOY_FILE_MRF, gcc->first_free_mrf, 0)); /* m0.5: destination index */ gs_COPY1(tc, mrf_header, 5, index, 0); /* m0.0 - m0.3: RGBA */ gs_COPY4(tc, mrf_header, 0, tsrc_type(out, mrf_header.type), 0); desc = tsrc_imm_mdesc_data_port(tc, false, 1, send_write_commit_message, true, send_write_commit_message, GEN6_MSG_DP_SVB_WRITE, 0, binding_table_index); tc_SEND(tc, dst, tsrc_from(mrf_header), desc, GEN6_SFID_DP_RC); }
static void vs_lower_opcode_tgsi_const_gen7(struct vs_compile_context *vcc, struct toy_dst dst, int dim, struct toy_src idx) { struct toy_compiler *tc = &vcc->tc; const struct toy_dst offset = tdst_ud(tdst(TOY_FILE_MRF, vcc->first_free_mrf, 0)); struct toy_src desc; if (vs_lower_opcode_tgsi_const_pcb(vcc, dst, dim, idx)) return; /* * In 259b65e2e7938de4aab323033cfe2b33369ddb07, pull constant load was * changed from OWord Dual Block Read to ld to increase performance in the * classic driver. Since we use the constant cache instead of the data * cache, I wonder if we still want to follow the classic driver. */ /* set offset */ tc_MOV(tc, offset, idx); desc = tsrc_imm_mdesc_sampler(tc, 1, 1, false, GEN6_MSG_SAMPLER_SIMD4X2, GEN6_MSG_SAMPLER_LD, 0, vcc->shader->bt.const_base + dim); tc_SEND(tc, dst, tsrc_from(offset), desc, GEN6_SFID_SAMPLER); }
static void gs_setup_vars(struct gs_compile_context *gcc) { int grf = gcc->first_free_grf; int i; gcc->vars.urb_write_header = tdst_d(tdst(TOY_FILE_GRF, grf, 0)); grf++; gcc->vars.tmp = tdst(TOY_FILE_GRF, grf, 0); grf++; if (gcc->write_so) { gcc->vars.buffer_needed = gcc->out_vue_min_count - 1; for (i = 0; i < gcc->vars.buffer_needed; i++) { gcc->vars.buffers[i] = tdst(TOY_FILE_GRF, grf, 0); grf += gcc->shader->out.count; } gcc->vars.so_written = tdst_d(tdst(TOY_FILE_GRF, grf, 0)); grf++; gcc->vars.so_index = tdst_d(tdst(TOY_FILE_GRF, grf, 0)); grf++; } gcc->first_free_grf = grf; if (!gcc->tgsi.reg_mapping) { for (i = 0; i < gcc->shader->out.count; i++) gcc->vars.tgsi_outs[i] = tsrc(TOY_FILE_GRF, grf++, 0); gcc->first_free_grf = grf; return; } for (i = 0; i < gcc->shader->out.count; i++) { const int slot = gcc->output_map[i]; const int vrf = (slot >= 0) ? toy_tgsi_get_vrf(&gcc->tgsi, TGSI_FILE_OUTPUT, 0, gcc->tgsi.outputs[slot].index) : -1; if (vrf >= 0) gcc->vars.tgsi_outs[i] = tsrc(TOY_FILE_VRF, vrf, 0); else gcc->vars.tgsi_outs[i] = (i == 0) ? tsrc_imm_d(0) : tsrc_imm_f(0.0f); } }
static void fs_lower_opcode_tgsi_const_gen6(struct fs_compile_context *fcc, struct toy_dst dst, int dim, struct toy_src idx) { const struct toy_dst header = tdst_ud(tdst(TOY_FILE_MRF, fcc->first_free_mrf, 0)); const struct toy_dst global_offset = tdst_ud(tdst(TOY_FILE_MRF, fcc->first_free_mrf, 2 * 4)); const struct toy_src r0 = tsrc_ud(tsrc(TOY_FILE_GRF, 0, 0)); struct toy_compiler *tc = &fcc->tc; unsigned msg_type, msg_ctrl, msg_len; struct toy_inst *inst; struct toy_src desc; struct toy_dst tmp, real_dst[4]; int i; /* set message header */ inst = tc_MOV(tc, header, r0); inst->mask_ctrl = BRW_MASK_DISABLE; /* set global offset */ inst = tc_MOV(tc, global_offset, idx); inst->mask_ctrl = BRW_MASK_DISABLE; inst->exec_size = BRW_EXECUTE_1; inst->src[0].rect = TOY_RECT_010; msg_type = BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ; msg_ctrl = BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW << 8; msg_len = 1; desc = tsrc_imm_mdesc_data_port(tc, false, msg_len, 1, true, false, msg_type, msg_ctrl, ILO_WM_CONST_SURFACE(dim)); tmp = tc_alloc_tmp(tc); tc_SEND(tc, tmp, tsrc_from(header), desc, fcc->const_cache); tdst_transpose(dst, real_dst); for (i = 0; i < 4; i++) { const struct toy_src src = tsrc_offset(tsrc_rect(tsrc_from(tmp), TOY_RECT_010), 0, i); /* cast to type D to make sure these are raw moves */ tc_MOV(tc, tdst_d(real_dst[i]), tsrc_d(src)); } }
static void gs_ff_sync(struct gs_compile_context *gcc, struct toy_dst dst, struct toy_src num_prims) { struct toy_compiler *tc = &gcc->tc; struct toy_dst mrf_header = tdst_d(tdst(TOY_FILE_MRF, gcc->first_free_mrf, 0)); struct toy_src desc; bool allocate; gs_COPY8(tc, mrf_header, gcc->payload.header); /* set NumSOVertsToWrite and NumSOPrimsNeeded */ if (gcc->write_so) { if (num_prims.file == TOY_FILE_IMM) { const uint32_t v = (num_prims.val32 * gcc->in_vue_count) << 16 | num_prims.val32; gs_COPY1(tc, mrf_header, 0, tsrc_imm_d(v), 0); } else { struct toy_dst m0_0 = tdst_d(gcc->vars.tmp); tc_MUL(tc, m0_0, num_prims, tsrc_imm_d(gcc->in_vue_count << 16)); tc_OR(tc, m0_0, tsrc_from(m0_0), num_prims); gs_COPY1(tc, mrf_header, 0, tsrc_from(m0_0), 0); } } /* set NumGSPrimsGenerated */ if (gcc->write_vue) gs_COPY1(tc, mrf_header, 1, num_prims, 0); /* * From the Sandy Bridge PRM, volume 2 part 1, page 173: * * "Programming Note: If the GS stage is enabled, software must always * allocate at least one GS URB Entry. This is true even if the GS * thread never needs to output vertices to the pipeline, e.g., when * only performing stream output. This is an artifact of the need to * pass the GS thread an initial destination URB handle." */ allocate = true; desc = tsrc_imm_mdesc_urb(tc, false, 1, 1, false, false, allocate, false, 0, 1); tc_SEND(tc, dst, tsrc_from(mrf_header), desc, GEN6_SFID_URB); }
static void gs_lower_opcode_tgsi_direct(struct gs_compile_context *gcc, struct toy_inst *inst) { struct toy_compiler *tc = &gcc->tc; int dim, idx; assert(inst->src[0].file == TOY_FILE_IMM); dim = inst->src[0].val32; assert(inst->src[1].file == TOY_FILE_IMM); idx = inst->src[1].val32; switch (inst->opcode) { case TOY_OPCODE_TGSI_IN: gs_lower_opcode_tgsi_in(gcc, inst->dst, dim, idx); /* fetch all dimensions */ if (dim == 0) { int i; for (i = 1; i < gcc->in_vue_count; i++) { const int vrf = toy_tgsi_get_vrf(&gcc->tgsi, TGSI_FILE_INPUT, i, idx); struct toy_dst dst; if (vrf < 0) continue; dst = tdst(TOY_FILE_VRF, vrf, 0); gs_lower_opcode_tgsi_in(gcc, dst, i, idx); } } break; case TOY_OPCODE_TGSI_IMM: assert(!dim); gs_lower_opcode_tgsi_imm(gcc, inst->dst, idx); break; case TOY_OPCODE_TGSI_CONST: case TOY_OPCODE_TGSI_SV: default: tc_fail(tc, "unhandled TGSI fetch"); break; } tc_discard_inst(tc, inst); }
static void gs_discard(struct gs_compile_context *gcc) { struct toy_compiler *tc = &gcc->tc; struct toy_dst mrf_header; struct toy_src desc; mrf_header = tdst_d(tdst(TOY_FILE_MRF, gcc->first_free_mrf, 0)); gs_COPY8(tc, mrf_header, tsrc_from(gcc->vars.urb_write_header)); desc = tsrc_imm_mdesc_urb(tc, true, 1, 0, true, false, false, false, 0, 0); tc_add2(tc, TOY_OPCODE_URB_WRITE, tdst_null(), tsrc_from(mrf_header), desc); }
static void fs_lower_opcode_tgsi_const_gen7(struct fs_compile_context *fcc, struct toy_dst dst, int dim, struct toy_src idx) { struct toy_compiler *tc = &fcc->tc; const struct toy_dst offset = tdst_ud(tdst(TOY_FILE_MRF, fcc->first_free_mrf, 0)); struct toy_src desc; struct toy_inst *inst; struct toy_dst tmp, real_dst[4]; int i; /* * In 4c1fdae0a01b3f92ec03b61aac1d3df500d51fc6, pull constant load was * changed from OWord Block Read to ld to increase performance in the * classic driver. Since we use the constant cache instead of the data * cache, I wonder if we still want to follow the classic driver. */ /* set offset */ inst = tc_MOV(tc, offset, tsrc_rect(idx, TOY_RECT_010)); inst->exec_size = BRW_EXECUTE_8; inst->mask_ctrl = BRW_MASK_DISABLE; desc = tsrc_imm_mdesc_sampler(tc, 1, 1, false, BRW_SAMPLER_SIMD_MODE_SIMD4X2, GEN5_SAMPLER_MESSAGE_SAMPLE_LD, 0, ILO_WM_CONST_SURFACE(dim)); tmp = tc_alloc_tmp(tc); inst = tc_SEND(tc, tmp, tsrc_from(offset), desc, BRW_SFID_SAMPLER); inst->exec_size = BRW_EXECUTE_8; inst->mask_ctrl = BRW_MASK_DISABLE; tdst_transpose(dst, real_dst); for (i = 0; i < 4; i++) { const struct toy_src src = tsrc_offset(tsrc_rect(tsrc_from(tmp), TOY_RECT_010), 0, i); /* cast to type D to make sure these are raw moves */ tc_MOV(tc, tdst_d(real_dst[i]), tsrc_d(src)); } }
static void cs_dummy(struct cs_compile_context *ccc) { struct toy_compiler *tc = &ccc->tc; struct toy_dst header; struct toy_src r0, desc; struct toy_inst *inst; header = tdst_ud(tdst(TOY_FILE_MRF, ccc->first_free_mrf, 0)); r0 = tsrc_ud(tsrc(TOY_FILE_GRF, 0, 0)); inst = tc_MOV(tc, header, r0); inst->exec_size = GEN6_EXECSIZE_8; inst->mask_ctrl = GEN6_MASKCTRL_NOMASK; desc = tsrc_imm_mdesc(tc, true, 1, 0, true, GEN6_MSG_TS_RESOURCE_SELECT_NO_DEREF | GEN6_MSG_TS_REQUESTER_TYPE_ROOT | GEN6_MSG_TS_OPCODE_DEREF); tc_SEND(tc, tdst_null(), tsrc_from(header), desc, GEN6_SFID_SPAWNER); }
/** * Emit instructions to write the VUE. */ static void vs_write_vue(struct vs_compile_context *vcc) { struct toy_compiler *tc = &vcc->tc; struct toy_src outs[PIPE_MAX_SHADER_OUTPUTS]; struct toy_dst header; struct toy_src r0; struct toy_inst *inst; int sent_attrs, total_attrs; header = tdst_ud(tdst(TOY_FILE_MRF, vcc->first_free_mrf, 0)); r0 = tsrc_ud(tsrc(TOY_FILE_GRF, 0, 0)); inst = tc_MOV(tc, header, r0); inst->mask_ctrl = GEN6_MASKCTRL_NOMASK; if (ilo_dev_gen(tc->dev) >= ILO_GEN(7)) { inst = tc_OR(tc, tdst_offset(header, 0, 5), tsrc_rect(tsrc_offset(r0, 0, 5), TOY_RECT_010), tsrc_rect(tsrc_imm_ud(0xff00), TOY_RECT_010)); inst->exec_size = GEN6_EXECSIZE_1; inst->access_mode = GEN6_ALIGN_1; inst->mask_ctrl = GEN6_MASKCTRL_NOMASK; } total_attrs = vs_collect_outputs(vcc, outs); sent_attrs = 0; while (sent_attrs < total_attrs) { struct toy_src desc; int mrf = vcc->first_free_mrf + 1, avail_mrf_for_attrs; int num_attrs, msg_len, i; bool eot; num_attrs = total_attrs - sent_attrs; eot = true; /* see if we need another message */ avail_mrf_for_attrs = vcc->last_free_mrf - mrf + 1; if (num_attrs > avail_mrf_for_attrs) { /* * From the Sandy Bridge PRM, volume 4 part 2, page 22: * * "Offset. This field specifies a destination offset (in 256-bit * units) from the start of the URB entry(s), as referenced by * URB Return Handle n, at which the data (if any) will be * written." * * As we need to offset the following messages, we must make sure * this one writes an even number of attributes. */ num_attrs = avail_mrf_for_attrs & ~1; eot = false; } if (ilo_dev_gen(tc->dev) >= ILO_GEN(7)) { /* do not forget about the header */ msg_len = 1 + num_attrs; } else { /* * From the Sandy Bridge PRM, volume 4 part 2, page 26: * * "At least 256 bits per vertex (512 bits total, M1 & M2) must * be written. Writing only 128 bits per vertex (256 bits * total, M1 only) results in UNDEFINED operation." * * "[DevSNB] Interleave writes must be in multiples of 256 per * vertex." * * That is, we must write or appear to write an even number of * attributes, starting from two. */ if (num_attrs % 2 && num_attrs == avail_mrf_for_attrs) { num_attrs--; eot = false; } msg_len = 1 + align(num_attrs, 2); } for (i = 0; i < num_attrs; i++) tc_MOV(tc, tdst(TOY_FILE_MRF, mrf++, 0), outs[sent_attrs + i]); assert(sent_attrs % 2 == 0); desc = tsrc_imm_mdesc_urb(tc, eot, msg_len, 0, eot, true, false, true, sent_attrs / 2, 0); tc_add2(tc, TOY_OPCODE_URB_WRITE, tdst_null(), tsrc_from(header), desc); sent_attrs += num_attrs; } }
/** * Collect the toy registers to be written to the VUE. */ static int vs_collect_outputs(struct vs_compile_context *vcc, struct toy_src *outs) { const struct toy_tgsi *tgsi = &vcc->tgsi; unsigned i; for (i = 0; i < vcc->shader->out.count; i++) { const int slot = vcc->output_map[i]; const int vrf = (slot >= 0) ? toy_tgsi_get_vrf(tgsi, TGSI_FILE_OUTPUT, 0, tgsi->outputs[slot].index) : -1; struct toy_src src; if (vrf >= 0) { struct toy_dst dst; dst = tdst(TOY_FILE_VRF, vrf, 0); src = tsrc_from(dst); if (i == 0) { /* PSIZE is at channel W */ tc_MOV(&vcc->tc, tdst_writemask(dst, TOY_WRITEMASK_W), tsrc_swizzle1(src, TOY_SWIZZLE_X)); /* the other channels are for the header */ dst = tdst_d(dst); tc_MOV(&vcc->tc, tdst_writemask(dst, TOY_WRITEMASK_XYZ), tsrc_imm_d(0)); } else { /* initialize unused channels to 0.0f */ if (tgsi->outputs[slot].undefined_mask) { dst = tdst_writemask(dst, tgsi->outputs[slot].undefined_mask); tc_MOV(&vcc->tc, dst, tsrc_imm_f(0.0f)); } } } else { /* XXX this is too ugly */ if (vcc->shader->out.semantic_names[i] == TGSI_SEMANTIC_CLIPDIST && slot < 0) { /* ok, we need to compute clip distance */ int clipvert_slot = -1, clipvert_vrf, j; for (j = 0; j < tgsi->num_outputs; j++) { if (tgsi->outputs[j].semantic_name == TGSI_SEMANTIC_CLIPVERTEX) { clipvert_slot = j; break; } else if (tgsi->outputs[j].semantic_name == TGSI_SEMANTIC_POSITION) { /* remember pos, but keep looking */ clipvert_slot = j; } } clipvert_vrf = (clipvert_slot >= 0) ? toy_tgsi_get_vrf(tgsi, TGSI_FILE_OUTPUT, 0, tgsi->outputs[clipvert_slot].index) : -1; if (clipvert_vrf >= 0) { struct toy_dst tmp = tc_alloc_tmp(&vcc->tc); struct toy_src clipvert = tsrc(TOY_FILE_VRF, clipvert_vrf, 0); int first_ucp, last_ucp; if (vcc->shader->out.semantic_indices[i]) { first_ucp = 4; last_ucp = MIN2(7, vcc->variant->u.vs.num_ucps - 1); } else { first_ucp = 0; last_ucp = MIN2(3, vcc->variant->u.vs.num_ucps - 1); } for (j = first_ucp; j <= last_ucp; j++) { const int plane_grf = vcc->first_ucp_grf + j / 2; const int plane_subreg = (j & 1) * 16; const struct toy_src plane = tsrc_rect(tsrc(TOY_FILE_GRF, plane_grf, plane_subreg), TOY_RECT_041); const unsigned writemask = 1 << ((j >= 4) ? j - 4 : j); tc_DP4(&vcc->tc, tdst_writemask(tmp, writemask), clipvert, plane); } src = tsrc_from(tmp); } else { src = tsrc_imm_f(0.0f); } } else { src = (i == 0) ? tsrc_imm_d(0) : tsrc_imm_f(0.0f); } } outs[i] = src; } return i; }
/** * Emit instructions to move sampling parameters to the message registers. */ static int vs_add_sampler_params(struct toy_compiler *tc, int msg_type, int base_mrf, struct toy_src coords, int num_coords, struct toy_src bias_or_lod, struct toy_src ref_or_si, struct toy_src ddx, struct toy_src ddy, int num_derivs) { const unsigned coords_writemask = (1 << num_coords) - 1; struct toy_dst m[3]; int num_params, i; assert(num_coords <= 4); assert(num_derivs <= 3 && num_derivs <= num_coords); for (i = 0; i < Elements(m); i++) m[i] = tdst(TOY_FILE_MRF, base_mrf + i, 0); switch (msg_type) { case GEN6_MSG_SAMPLER_SAMPLE_L: tc_MOV(tc, tdst_writemask(m[0], coords_writemask), coords); tc_MOV(tc, tdst_writemask(m[1], TOY_WRITEMASK_X), bias_or_lod); num_params = 5; break; case GEN6_MSG_SAMPLER_SAMPLE_D: tc_MOV(tc, tdst_writemask(m[0], coords_writemask), coords); tc_MOV(tc, tdst_writemask(m[1], TOY_WRITEMASK_XZ), tsrc_swizzle(ddx, 0, 0, 1, 1)); tc_MOV(tc, tdst_writemask(m[1], TOY_WRITEMASK_YW), tsrc_swizzle(ddy, 0, 0, 1, 1)); if (num_derivs > 2) { tc_MOV(tc, tdst_writemask(m[2], TOY_WRITEMASK_X), tsrc_swizzle1(ddx, 2)); tc_MOV(tc, tdst_writemask(m[2], TOY_WRITEMASK_Y), tsrc_swizzle1(ddy, 2)); } num_params = 4 + num_derivs * 2; break; case GEN6_MSG_SAMPLER_SAMPLE_L_C: tc_MOV(tc, tdst_writemask(m[0], coords_writemask), coords); tc_MOV(tc, tdst_writemask(m[1], TOY_WRITEMASK_X), ref_or_si); tc_MOV(tc, tdst_writemask(m[1], TOY_WRITEMASK_Y), bias_or_lod); num_params = 6; break; case GEN6_MSG_SAMPLER_LD: assert(num_coords <= 3); tc_MOV(tc, tdst_writemask(tdst_d(m[0]), coords_writemask), coords); tc_MOV(tc, tdst_writemask(tdst_d(m[0]), TOY_WRITEMASK_W), bias_or_lod); if (ilo_dev_gen(tc->dev) >= ILO_GEN(7)) { num_params = 4; } else { tc_MOV(tc, tdst_writemask(tdst_d(m[1]), TOY_WRITEMASK_X), ref_or_si); num_params = 5; } break; case GEN6_MSG_SAMPLER_RESINFO: tc_MOV(tc, tdst_writemask(tdst_d(m[0]), TOY_WRITEMASK_X), bias_or_lod); num_params = 1; break; default: tc_fail(tc, "unknown sampler opcode"); num_params = 0; break; } return (num_params + 3) / 4; }
/** * Emit instructions to write the color buffers (and the depth buffer). */ static void fs_write_fb(struct fs_compile_context *fcc) { struct toy_compiler *tc = &fcc->tc; int base_mrf = fcc->first_free_mrf; const struct toy_dst header = tdst_ud(tdst(TOY_FILE_MRF, base_mrf, 0)); bool header_present = false; struct toy_src desc; unsigned msg_type, ctrl; int color_slots[ILO_MAX_DRAW_BUFFERS], num_cbufs; int pos_slot = -1, cbuf, i; for (i = 0; i < Elements(color_slots); i++) color_slots[i] = -1; for (i = 0; i < fcc->tgsi.num_outputs; i++) { if (fcc->tgsi.outputs[i].semantic_name == TGSI_SEMANTIC_COLOR) { assert(fcc->tgsi.outputs[i].semantic_index < Elements(color_slots)); color_slots[fcc->tgsi.outputs[i].semantic_index] = i; } else if (fcc->tgsi.outputs[i].semantic_name == TGSI_SEMANTIC_POSITION) { pos_slot = i; } } num_cbufs = fcc->variant->u.fs.num_cbufs; /* still need to send EOT (and probably depth) */ if (!num_cbufs) num_cbufs = 1; /* we need the header to specify the pixel mask or render target */ if (fcc->tgsi.uses_kill || num_cbufs > 1) { const struct toy_src r0 = tsrc_ud(tsrc(TOY_FILE_GRF, 0, 0)); struct toy_inst *inst; inst = tc_MOV(tc, header, r0); inst->mask_ctrl = BRW_MASK_DISABLE; base_mrf += fcc->num_grf_per_vrf; /* this is a two-register header */ if (fcc->dispatch_mode == GEN6_WM_8_DISPATCH_ENABLE) { inst = tc_MOV(tc, tdst_offset(header, 1, 0), tsrc_offset(r0, 1, 0)); inst->mask_ctrl = BRW_MASK_DISABLE; base_mrf += fcc->num_grf_per_vrf; } header_present = true; } for (cbuf = 0; cbuf < num_cbufs; cbuf++) { const int slot = color_slots[(fcc->tgsi.props.fs_color0_writes_all_cbufs) ? 0 : cbuf]; int mrf = base_mrf, vrf; struct toy_src src[4]; if (slot >= 0) { const unsigned undefined_mask = fcc->tgsi.outputs[slot].undefined_mask; const int index = fcc->tgsi.outputs[slot].index; vrf = toy_tgsi_get_vrf(&fcc->tgsi, TGSI_FILE_OUTPUT, 0, index); if (vrf >= 0) { const struct toy_src tmp = tsrc(TOY_FILE_VRF, vrf, 0); tsrc_transpose(tmp, src); } else { /* use (0, 0, 0, 0) */ tsrc_transpose(tsrc_imm_f(0.0f), src); } for (i = 0; i < 4; i++) { const struct toy_dst dst = tdst(TOY_FILE_MRF, mrf, 0); if (undefined_mask & (1 << i)) src[i] = tsrc_imm_f(0.0f); tc_MOV(tc, dst, src[i]); mrf += fcc->num_grf_per_vrf; } } else { /* use (0, 0, 0, 0) */ for (i = 0; i < 4; i++) { const struct toy_dst dst = tdst(TOY_FILE_MRF, mrf, 0); tc_MOV(tc, dst, tsrc_imm_f(0.0f)); mrf += fcc->num_grf_per_vrf; } } /* select BLEND_STATE[rt] */ if (cbuf > 0) { struct toy_inst *inst; inst = tc_MOV(tc, tdst_offset(header, 0, 2), tsrc_imm_ud(cbuf)); inst->mask_ctrl = BRW_MASK_DISABLE; inst->exec_size = BRW_EXECUTE_1; inst->src[0].rect = TOY_RECT_010; } if (cbuf == 0 && pos_slot >= 0) { const int index = fcc->tgsi.outputs[pos_slot].index; const struct toy_dst dst = tdst(TOY_FILE_MRF, mrf, 0); struct toy_src src[4]; int vrf; vrf = toy_tgsi_get_vrf(&fcc->tgsi, TGSI_FILE_OUTPUT, 0, index); if (vrf >= 0) { const struct toy_src tmp = tsrc(TOY_FILE_VRF, vrf, 0); tsrc_transpose(tmp, src); } else { /* use (0, 0, 0, 0) */ tsrc_transpose(tsrc_imm_f(0.0f), src); } /* only Z */ tc_MOV(tc, dst, src[2]); mrf += fcc->num_grf_per_vrf; } msg_type = (fcc->dispatch_mode == GEN6_WM_16_DISPATCH_ENABLE) ? BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE : BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01; ctrl = (cbuf == num_cbufs - 1) << 12 | msg_type << 8; desc = tsrc_imm_mdesc_data_port(tc, cbuf == num_cbufs - 1, mrf - fcc->first_free_mrf, 0, header_present, false, GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE, ctrl, ILO_WM_DRAW_SURFACE(cbuf)); tc_add2(tc, TOY_OPCODE_FB_WRITE, tdst_null(), tsrc(TOY_FILE_MRF, fcc->first_free_mrf, 0), desc); } }