/** * Adjust VDD_CPU to offset aging. * 25mV for 1st year * 12mV for 2nd and 3rd year * 0mV for 4th year onwards */ void tegra_dvfs_age_cpu(int cur_linear_age) { int chip_linear_age; int chip_life; chip_linear_age = tegra_get_age(); chip_life = cur_linear_age - chip_linear_age; /*For T37 and AP37*/ if (tegra_cpu_speedo_id() == 12 || tegra_cpu_speedo_id() == 13) { if (chip_linear_age <= 0) { return; } else if (chip_life <= 12) { tegra_adjust_cpu_mvs(25); } else if (chip_life <= 36) { tegra_adjust_cpu_mvs(13); } } }
void tegra_cpu_mvs_init() { int default_uv = VDD_CPU_DEFAULT_MVS; #ifdef CONFIG_TEGRA_UNIFY_VARIANT /* dont use full default if we are treating a variant 3 as 4 */ if (!tegra_is_variant_4()) default_uv = VDD_CPU_DEFAULT_MVS_UNIFY; #endif tegra_adjust_cpu_mvs(default_uv); }