static void __init tegra_set_clock_readskew(const char *clk_name, int skew)
{
struct clk *c = tegra_get_clock_by_name(clk_name);
if (!c)
return;
tegra_sdmmc_tap_delay(c, skew);
clk_put(c);
}
static void __init tegra_shuttle_init(void)
{
struct clk *clk;
/* force consoles to stay enabled across suspend/resume */
// console_suspend_enabled = 0;
/* Set the SDMMC2 (wifi) tap delay to 6. This value is determined
* based on propagation delay on the PCB traces. */
clk = clk_get_sys("sdhci-tegra.1", NULL);
if (!IS_ERR(clk)) {
tegra_sdmmc_tap_delay(clk, 6);
clk_put(clk);
} else {
pr_err("Failed to set wifi sdmmc tap delay\n");
}
/* Initialize the pinmux */
shuttle_pinmux_init();
/* Initialize the clocks - clocks require the pinmux to be initialized first */
shuttle_clks_init();
/* Register i2c devices - required for Power management and MUST be done before the power register */
shuttle_i2c_register_devices();
/* Register UART devices */
shuttle_uart_register_devices();
#ifdef CONFIG_ANDROID_RAM_CONSOLE
/* Enable the ram console */
tegra_ram_console_debug_init();
#endif
/* Register the power subsystem - Including the poweroff handler - Required by all the others */
shuttle_power_register_devices();
/* Register the USB device */
shuttle_usb_register_devices();
/* Register SPI devices */
shuttle_spi_register_devices();
/* Register GPU devices */
shuttle_gpu_register_devices();
/* Register Audio devices */
shuttle_audio_register_devices();
/* Register AES encryption devices */
shuttle_aes_register_devices();
/* Register Watchdog devices */
shuttle_wdt_register_devices();
/* Register all the keyboard devices */
shuttle_keyboard_register_devices();
/* Register touchscreen devices */
shuttle_touch_register_devices();
/* Register SDHCI devices */
shuttle_sdhci_register_devices();
/* Register accelerometer device */
shuttle_sensors_register_devices();
/* Register wlan powermanagement devices */
shuttle_wlan_pm_register_devices();
/* Register gps powermanagement devices */
shuttle_gps_pm_register_devices();
/* Register gsm powermanagement devices */
shuttle_gsm_pm_register_devices();
/* Register Bluetooth powermanagement devices */
shuttle_bt_pm_register_devices();
/* Register Camera powermanagement devices */
shuttle_camera_pm_register_devices();
/* Register NAND flash devices */
shuttle_nand_register_devices();
#if 0
/* Finally, init the external memory controller and memory frequency scaling
NB: This is not working on P10AN01. And seems there is no point in fixing it,
as the EMC clock is forced to the maximum speed as soon as the 2D/3D engine
starts.*/
shuttle_init_emc();
#endif
#ifdef _DUMP_WBCODE
dump_warmboot(tegra_lp0_vec_start,tegra_lp0_vec_size);
#endif
#ifdef _DUMP_BOOTCAUSE
dump_bootflags();
#endif
/* Release the tegra bootloader framebuffer */
tegra_release_bootloader_fb();
/* Initialize the watchdog suspend recovery */
#ifdef CONFIG_TEGRA_WDT_RECOVERY
tegra_wdt_recovery_init();
#endif
}
static void __init tegra_smba1002_init(void)
{
struct clk *clk;
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38)
tegra_common_init();
#endif
/* force consoles to stay enabled across suspend/resume */
// console_suspend_enabled = 0;
/* Init the suspend information */
tegra_init_suspend(&smba1002_suspend);
/* Set the SDMMC1 (wifi) tap delay to 6. This value is determined
* based on propagation delay on the PCB traces. */
clk = clk_get_sys("sdhci-tegra.0", NULL);
if (!IS_ERR(clk)) {
tegra_sdmmc_tap_delay(clk, 6);
clk_put(clk);
} else {
pr_err("Failed to set wifi sdmmc tap delay\n");
}
/* Initialize the clocks */
smba1002_clks_init();
/* Initialize the pinmux */
smba1002_pinmux_init();
/* Register i2c devices - required for Power management and MUST be done before the power register */
smba1002_i2c_register_devices();
/* Register the power subsystem - Including the poweroff handler - Required by all the others */
smba1002_power_register_devices();
/* Register the USB device */
smba1002_usb_register_devices();
/* Register UART devices */
smba1002_uart_register_devices();
/* Register SPI devices */
smba1002_spi_register_devices();
/* Register GPU devices */
smba1002_gpu_register_devices();
/* Register Audio devices */
// smba1002_audio_register_devices();
/* Register AES encryption devices */
smba1002_aes_register_devices();
/* Register Watchdog devices */
smba1002_wdt_register_devices();
/* Register all the keyboard devices */
smba1002_keyboard_register_devices();
/* Register touchscreen devices */
smba1002_touch_register_devices();
/* Register SDHCI devices */
smba1002_sdhci_register_devices();
/* Register accelerometer device */
smba1002_sensors_register_devices();
/* Register wlan powermanagement devices */
// smba1002_wlan_pm_register_devices();
/* Register gps powermanagement devices */
smba1002_gps_pm_register_devices();
/* Register gsm powermanagement devices */
smba1002_gsm_pm_register_devices();
/* Register Bluetooth powermanagement devices */
smba1002_bt_pm_register_devices();
/* Register Camera powermanagement devices */
// smba1002_camera_register_devices();
/* Register NAND flash devices */
smba1002_nand_register_devices();
smba1002_gps_mag_init();
smba1002_gps_mag_poweron();
#if 0
/* Finally, init the external memory controller and memory frequency scaling
NB: This is not working on SMBA1002. And seems there is no point in fixing it,
as the EMC clock is forced to the maximum speed as soon as the 2D/3D engine
starts.*/
smba1002_init_emc();
#endif
}