// This function is used to shutdown everything exept USB
// When this function return all the peripheral should be :
// - Disabled
// - In minimal power consuption mode
void switch_off(void) {
behavior_stop(B_ALL);
timer_disable(TIMER_1KHZ);
timer_disable_interrupt(TIMER_1KHZ);
_LVDIE = 0;
// Why waiting on valid vbat ?
// => We use an aseba variable, the user may corrupt it
wait_valid_vbat(); // ir autocalibration is using it.
analog_disable();
pwm_motor_poweroff();
prox_poweroff();
save_settings();
sound_poweroff();
sd_shutdown();
leds_poweroff();
mma7660_suspend();
rf_poweroff();
I2C3CONbits.I2CEN = 0; // Disable i2c.
_MI2C3IE = 0;
ntc_shutdown();
rc5_shutdown();
CHARGE_500MA = 0;
// TODO: Force VA ?! Check me that refcount is correct
}
static u32
get_hz()
{
// divided counter by 16
lapic_write_reg(_LAPIC_DC_OFFSET, 0x3);
// enable timer interrupt(vector 255)
lapic_write_reg(_LAPIC_TIMER_OFFSET, 0xff);
timer_enable();
// initialize PIT channel 2 in one-shot mode
// waiting 1/100 sec
outb(0x61, (inb(0x61)&0xfd)|1);
outb(0x43, 0xb2);
// 1193182/100 = 11932 = 0x2e9c
outb(0x42, 0x9c); // lsb
inb(0x60); // short delay
outb(0x42, 0x2e); // msb
// reload counter
u8 v = inb(0x61) & 0xfe;
outb(0x61, v);
outb(0x61, v|1);
// reset apic timer init counter to -1
lapic_write_reg(_LAPIC_IC_OFFSET, 0xffffffff);
// wait until the PIT counter reaches zero
while (!(inb(0x61) & 0x20));
// disable timer interrupt
timer_disable();
return (0xffffffff - lapic_read_reg(_LAPIC_CC_OFFSET) + 1) * 100 * 16;
}
void __attribute__ ((interrupt)) TIMER1_IRQHandler() {
// Clear interrupt flag
*TIMER1_IFC = 1;
//check if at end of note, may go to next note
if ( counter >= current_note_length ) {
counter = 0;
note_counter++;
} else {
counter++;
}
//check if at end of song, resets values if true and end function
if ( note_counter >= current_song->length ) {
music_cleanup();
gpio_led_clear();
dac_disable();
timer_disable();
sleep_setup(0b110);
return;
}
//creates temp pointer to note, play that frequency
Note* n_temp = current_song->notes[note_counter];
int offset = (song_iterator % n_temp->length);
music_note_to_dac(n_temp, offset);
song_iterator++;
}
void game_end() {
//turns off all communication with Node2
timer_disable();
//can_play_music();
oled_clear_screen();
//print GAME OVER
oled_pos(3, 4);
oled_printf("GAME OVER");
_delay_ms(1500);
oled_clear_screen();
oled_pos(2, 2);
oled_printf("Final score:");
oled_pos(4, 7);
oled_printf("%d", game_score);
printf("Final score: %d\n", game_score);
oled_pos(7, 0);
oled_printf("press any button");
while ((!button_read(2) && !button_read(1) && button_read(3)) ); //wait for button press
_delay_ms(100);
oled_clear_screen();
}
static int diag_sd_init(char *argv[], const char *test_name, int verbose)
{
int rval = 0;
int slot, type;
putstr("running SD ");
putstr(test_name);
putstr(" test ...\r\n");
putstr("press any key to terminate!\r\n");
if (strcmp(argv[0], "sd") == 0) {
slot = SCARDMGR_SLOT_SD;
} else if (strcmp(argv[0], "sdio") == 0) {
slot = SCARDMGR_SLOT_SDIO;
} else if (strcmp(argv[0], "sd2") == 0) {
slot = SCARDMGR_SLOT_SD2;
} else {
slot = SCARDMGR_SLOT_SD;
}
if (strcmp(argv[1], "sd") == 0) {
type = SDMMC_TYPE_SD;
} else if (strcmp(argv[1], "sdhc") == 0) {
type = SDMMC_TYPE_SDHC;
} else if (strcmp(argv[1], "mmc") == 0) {
type = SDMMC_TYPE_MMC;
} else if (strcmp(argv[1], "MoviNAND") == 0) {
type = SDMMC_TYPE_MOVINAND;
} else {
type = SDMMC_TYPE_AUTO;
}
timer_reset_count(TIMER2_ID);
timer_enable(TIMER2_ID);
rval = sdmmc_init(slot, type);
timer_disable(TIMER2_ID);
if (verbose) {
putstr("\r\nInit takes: ");
putdec(timer_get_count(TIMER2_ID));
putstr("mS\r\n");
putstr("SD clock: ");
putdec(get_sd_freq_hz());
putstr("Hz\r\n");
#if (SD_HAS_SDXC_CLOCK == 1)
putstr("SDXC clock: ");
#if (CHIP_REV == A7S)
putdec((u32)amb_get_sdio_clock_frequency(HAL_BASE_VP));
#else
putdec((u32)amb_get_sdxc_clock_frequency(HAL_BASE_VP));
#endif
putstr("Hz\r\n");
#endif
putstr("total_secs: ");
putdec(sdmmc_get_total_sectors());
putstr("\r\n");
}
return rval;
}
static int
device_disable_impl (struct device_interface *di, struct sh7780_tmu *device)
{
device->state = STATE_DISABLED;
timer_disable(device);
return DEVICE_DISABLED;
}
// to be finished:
// should disconnect the interrupt here
// modified by shanlei
void timer_destroy( TiTimerAdapter * timer )
{
timer_disable( timer );
if (timer->state & TIMER_STATE_INTERRUPT)
{
timer_VICdisable( timer );
}
timer = NULL;
}
static int
device_disable_impl (struct device_interface *di, struct imx31_timer *device)
{
device->state = STATE_DISABLED;
timer_disable(device);
DBG("timer is disabled\n");
return DEVICE_DISABLED;
}
// pulse rate oscillates the led brightness between max_brightness and min_brightness
// param: rate - the number of cycles to wait before interrupting (which changes master_brightness)
// (0 = no pulse, 1=fast pulse 1-2^32=slower pulse)
void set_pulse_rate(uint32_t ms){
timer_setOverflowVal(pulse_timer_id, ms*HZ_PER_MILLI_SEC);
if(ms > 0) {
timer_enable_allInterrupts(pulse_timer_id);
timer_enable(pulse_timer_id);
} else {
timer_disable_allInterrupts(pulse_timer_id);
timer_disable(pulse_timer_id);
}
}
int diag_sd_write_speed(char *argv[])
{
int rval = 0;
int i, j;
int total_secs;
int sector, sectors;
u8 *buf = (u8 *)DIAG_SD_BUF_START;
u32 op_size;
rval = diag_sd_init(argv, "Write Speed", 1);
if (rval < 0)
return rval;
for (i = 0; i < SECTORS_PER_OP * SECTOR_SIZE / 16; i++) {
for (j = 0; j < 16; j++) {
buf[(i * 16) + j] = i;
}
}
total_secs = sdmmc_get_total_sectors();
op_size = 0;
timer_reset_count(TIMER2_ID);
timer_enable(TIMER2_ID);
for (sector = 0; sector < total_secs; sector += SECTORS_PER_OP) {
if (uart_poll())
break;
if ((total_secs - sector) < SECTORS_PER_OP)
sectors = total_secs - sector;
else
sectors = SECTORS_PER_OP;
rval = sdmmc_write_sector(sector, sectors, (unsigned int *)buf);
if (rval < 0) {
putstr("\r\nfailed at sector ");
putdec(sector);
putstr("\r\n");
break;
}
op_size += sectors;
}
timer_disable(TIMER2_ID);
putstr("\r\nTotally write 0x");
puthex(op_size * SECTOR_SIZE);
putstr(" Bytes in ");
putdec(timer_get_count(TIMER2_ID));
putstr(" mS, about ");
putdec(op_size * 500 / timer_get_count(TIMER2_ID));
putstr(" KB/s!\r\n\r\n");
return rval;
}
static void update_timer(task_t* first)
{
if (first) {
if(first->timeout > get_clock_tick()) {
timer_deadline((uint32_t) (first->timeout - get_clock_tick()));
} else {
// workaround: start timer so new head will be serviced
timer_deadline(1);
}
} else {
// prevent spurious interrupts
timer_disable();
}
}
void timer_dly_ms(int tmr_id, u32 dly_tim)
{
u32 cur_tim;
u32 s_tck, e_tck;
timer_disable(tmr_id);
timer_enable(tmr_id);
s_tck = timer_get_tick(tmr_id);
while (1) {
e_tck = timer_get_tick(tmr_id);
cur_tim = timer_tick2ms(s_tck, e_tck);
if (cur_tim >= dly_tim)
break;
}
}
unsigned timer_single(uint32_t period) {
unsigned err = E_OK;
if (period == 0) {
timer_disable();
}
else {
IOWR16(A_TIMER, NIOS2_TIMER_PERIODL, period & 0x0000ffff);
IOWR16(A_TIMER, NIOS2_TIMER_PERIODH, period >> 16);
IOWR16(A_TIMER, NIOS2_TIMER_CONTROL, NIOS2_TIMER_CONTROL_ITO |
NIOS2_TIMER_CONTROL_START);
}
return err;
}
void game_end(void) {
timer_disable();
oled_clear_screen();
uint8_t rank = highscore_update(game_score);
if(rank) {
game_postGameMessage(rank);
_delay_ms(5000);
}
else {
oled_set_write_position(2, 8);
printf("You so bad.");
_delay_ms(5000);
}
highscore_print();
}
/*
* Handles the timer. In this case, it's very simple: We
* increment the 'timer_ticks' variable every time the
* timer fires.
*/
static void timer_handler(struct state *s)
{
#ifndef DYNAMIC_TICKS
/* Increment our 'tick counter' */
set_per_core(timer_ticks, per_core(timer_ticks)+1);
restart_periodic_timer();
#else
timer_disable();
#endif
#if 0
/*
* Every TIMER_FREQ clocks (approximately 1 second), we will
* display a message on the screen
*/
if (timer_ticks % TIMER_FREQ == 0) {
LOG_INFO("One second has passed %d\n", CORE_ID);
}
#endif
}
// modified by shanlei 06-11-14
// it will disable the VIC according to the timer->state
void timer_stop( TiTimerAdapter * timer )
{
uint8 checkid;
checkid = timer->id & 0xF0;
if(checkid == 0x00)
{
T0TCR = 0x00;
}
else if(checkid == 0x10)
{
T1TCR = 0x00;
}
timer_disable( timer );
if (timer->state & TIMER_STATE_INTERRUPT)
{
timer_VICdisable( timer );
}
timer->state &= (~TIMER_STATE_ENABLED);
}
static int
device_setup_impl (struct device_interface *di, struct imx31_timer *device, struct resource *resources)
{
int i, n_mem = 0;
for (i = 0; i < 8; i++)
{
switch (resources->type)
{
case MEMORY_RESOURCE:
if (n_mem == 0)
device->gpt_space = *resources;
else
printf("imx31_timer: got more memory than expected!\n");
n_mem++;
break;
case INTERRUPT_RESOURCE:
case BUS_RESOURCE:
case NO_RESOURCE:
/* do nothing */
break;
default:
printf("imx31_timer: Invalid resource type %d!\n", resources->type);
break;
}
resources++;
}
//device->gpt_space = *resources;
device->timer.device = device;
device->timer.ops = timer_ops;
reset_register_state(device);
timer_disable(device);
DBG("done, timer is disabled\n");
return DEVICE_SUCCESS;
}
int timer_init(const uint8_t timer, const timer_operation_mode mode, const timer_prescaler prescaler, const uint16_t preset)
{
// Initialize result
int res = TIMER_ERROR_SUCCESS;
// Disable timer first
res = timer_disable(timer);
if (res == TIMER_ERROR_SUCCESS)
{
// Set timer operation mode
res = timer_set_mode(timer, mode);
if (res == TIMER_ERROR_SUCCESS)
{
// Set preset value
res = timer_set(timer, preset);
if (res == TIMER_ERROR_SUCCESS)
{
// Set prescaler value and enable timer
res = timer_set_prescaler(timer, prescaler);
}
}
}
return res;
}
void dump(void){
int i;
unsigned long long hz = get_hz();
int last_recv_pkt = -1;
int total_pkts_dropped = npkts;
float tput_mbs;
timer_disable();
for (i=0; i<npkts; i++){
if (!suppress_dump)
printf("%5u %llu %llu (%llu) %llu\n", udpdata[i].seq, udpdata[i].tsctx,
udpdata[i].tscrx, udpdata[i].tscrx-udpdata[i].tsctx,
(udpdata[i].tscrx-udpdata[i].tsctx)*1000000/hz);
if(udpdata[i].tsctx != 0) {
last_recv_pkt = i;
--total_pkts_dropped;
}
}
// Print throughput
if (last_recv_pkt >= 0) {
tput_mbs = (long long)(npkts - total_pkts_dropped) * bufsz /
((udpdata[last_recv_pkt].tscrx - udpdata[0].tsctx)*1.0/hz) /
1000000.0;
} else {
tput_mbs = 0.0;
}
fprintf(stderr, "Average throughput: %.0f MB/s = %.2f Gbit/s\n",
tput_mbs, tput_mbs * 8 / 1000);
// Print number of dropped packets
fprintf(stderr, "Dropped packets: %d of %d (%.1f%%)\n",
total_pkts_dropped, npkts, total_pkts_dropped*100.0 / npkts);
}
int
main(int argc, char **argv)
{
(void)argc;
(void)argv;
tor_libevent_cfg cfg;
memset(&cfg, 0, sizeof(cfg));
tor_libevent_initialize(&cfg);
timers_initialize();
int i;
int ret;
struct timeval now;
tor_gettimeofday(&now);
monotime_get(&started_at);
for (i = 0; i < N_TIMERS; ++i) {
struct timeval delay;
delay.tv_sec = crypto_rand_int_range(0,MAX_DURATION);
delay.tv_usec = crypto_rand_int_range(0,1000000);
delay_usec[i] = delay.tv_sec * 1000000 + delay.tv_usec;
timeradd(&now, &delay, &fire_at[i]);
timers[i] = timer_new(timer_cb, &timers[i]);
timer_schedule(timers[i], &delay);
++n_active_timers;
}
/* Disable some; we'll make sure they don't trigger. */
for (i = 0; i < N_DISABLE; ++i) {
int idx = crypto_rand_int_range(0, N_TIMERS);
if (is_disabled[idx])
continue;
is_disabled[idx] = 1;
timer_disable(timers[idx]);
--n_active_timers;
}
tor_libevent_run_event_loop(tor_libevent_get_base(), 0);
int64_t total_difference = 0;
uint64_t total_square_difference = 0;
tor_assert(n_fired == n_active_timers);
for (i = 0; i < N_TIMERS; ++i) {
if (is_disabled[i]) {
tor_assert(fired[i] == 0);
continue;
}
tor_assert(fired[i] == 1);
//int64_t diff = difference[i].tv_usec + difference[i].tv_sec * 1000000;
int64_t diff = diffs_mono_usec[i];
total_difference += diff;
total_square_difference += diff*diff;
}
const int64_t mean_diff = total_difference / n_active_timers;
printf("mean difference: "I64_FORMAT" usec\n",
I64_PRINTF_ARG(mean_diff));
const double mean_sq = ((double)total_square_difference)/ n_active_timers;
const double sq_mean = mean_diff * mean_diff;
const double stddev = sqrt(mean_sq - sq_mean);
printf("standard deviation: %lf usec\n", stddev);
#define MAX_DIFF_USEC (500*1000)
#define MAX_STDDEV_USEC (500*1000)
#define ODD_DIFF_USEC (2000)
#define ODD_STDDEV_USEC (2000)
if (mean_diff < 0 || mean_diff > MAX_DIFF_USEC || stddev > MAX_STDDEV_USEC) {
printf("Either your system is under ridiculous load, or the "
"timer backend is broken.\n");
ret = 1;
} else if (mean_diff > ODD_DIFF_USEC || stddev > ODD_STDDEV_USEC) {
printf("Either your system is a bit slow or the "
"timer backend is odd.\n");
ret = 0;
} else {
printf("Looks good enough.\n");
ret = 0;
}
timer_free_(NULL);
for (i = 0; i < N_TIMERS; ++i) {
timer_free(timers[i]);
}
timers_shutdown();
return ret;
}
/**
* Destroy the timer and revoke allocated resources for this timer before.
*
* @attention This function assumes the timer object has already been stopped before.
* You should call timer_stop() first before calling this function.
*/
void timer_destroy( TiTimerAdapter * timer )
{
timer_disable( timer );
}
/*
* Configure a General Purpose Timer Module.
*
* @param timer The timer to configure.
* @param p_config Pointer to a timer configuration structure.
*/
void timer_configure(timer_module_t timer, const timer_config_t *p_config)
{
timer_registers_t *p_timer = timers[timer];
switch (timer)
{
case TIMER_0:
SYSCTL_RCGCTIMER_R = SYSCTL_RCGCTIMER_R0;
break;
case TIMER_1:
SYSCTL_RCGCTIMER_R = SYSCTL_RCGCTIMER_R1;
break;
case TIMER_2:
SYSCTL_RCGCTIMER_R = SYSCTL_RCGCTIMER_R2;
break;
case TIMER_3:
SYSCTL_RCGCTIMER_R = SYSCTL_RCGCTIMER_R3;
break;
case TIMER_4:
SYSCTL_RCGCTIMER_R = SYSCTL_RCGCTIMER_R4;
break;
case TIMER_5:
SYSCTL_RCGCTIMER_R = SYSCTL_RCGCTIMER_R5;
break;
case TIMER_WIDE_0:
SYSCTL_RCGCWTIMER_R = SYSCTL_RCGCWTIMER_R0;
break;
case TIMER_WIDE_1:
SYSCTL_RCGCWTIMER_R = SYSCTL_RCGCWTIMER_R1;
break;
case TIMER_WIDE_2:
SYSCTL_RCGCWTIMER_R = SYSCTL_RCGCWTIMER_R2;
break;
case TIMER_WIDE_3:
SYSCTL_RCGCWTIMER_R = SYSCTL_RCGCWTIMER_R3;
break;
case TIMER_WIDE_4:
SYSCTL_RCGCWTIMER_R = SYSCTL_RCGCWTIMER_R4;
break;
case TIMER_WIDE_5:
SYSCTL_RCGCWTIMER_R = SYSCTL_RCGCWTIMER_R5;
break;
}
/* Can't configure timers while they are running */
timer_disable(timer, TIMER_A);
timer_disable(timer, TIMER_B);
/* Set the defaults */
p_timer->TAMR = 0;
p_timer->TBMR = 0;
p_timer->CFG = 0;
p_timer->CTRL = 0;
switch (p_config->type)
{
case TIMER_JOINED:
/* The default */
break;
case TIMER_RTC:
SET_BITS(p_timer->CFG, 0x01);
break;
case TIMER_SPLIT:
SET_BITS(p_timer->CFG, 0x04);
break;
}
/* Process Timer A config */
switch (p_config->timer_a.type)
{
case TIMER_SPLIT_ONE_SHOT:
SET_BITS(p_timer->TAMR, TIMER_TAMR_TAMR_1_SHOT);
break;
case TIMER_SPLIT_PERIODIC:
SET_BITS(p_timer->TAMR, TIMER_TAMR_TAMR_PERIOD);
break;
case TIMER_SPLIT_CAPTURE_COUNT:
SET_BITS(p_timer->TAMR, TIMER_TAMR_TAMR_CAP);
break;
case TIMER_SPLIT_CAPTURE_TIME:
SET_BITS(p_timer->TAMR, TIMER_TAMR_TAMR_CAP);
SET_BITS(p_timer->TAMR, TIMER_TAMR_TACMR);
break;
case TIMER_SPLIT_PWM:
SET_BITS(p_timer->TAMR, TIMER_TAMR_TAMR_PERIOD);
SET_BITS(p_timer->TAMR, TIMER_TAMR_TAAMS);
break;
}
if (p_config->timer_a.count_up)
{
SET_BITS(p_timer->TAMR, TIMER_TAMR_TACDIR);
}
if (p_config->timer_a.match_interrupt)
{
SET_BITS(p_timer->TAMR, TIMER_TAMR_TAMIE);
}
if (p_config->timer_a.wait_on_trigger)
{
SET_BITS(p_timer->TAMR, TIMER_TAMR_TAWOT);
}
if (p_config->timer_a.snap_shot_mode)
{
SET_BITS(p_timer->TAMR, TIMER_TAMR_TASNAPS);
}
if (p_config->timer_a.interval_load_write)
{
SET_BITS(p_timer->TAMR, TIMER_TAMR_TAILD);
}
if (p_config->timer_a.pwm_interrupt)
{
SET_BITS(p_timer->TAMR, TIMER_TAMR_TAPWMIE);
}
if (p_config->timer_a.match_register_update)
{
SET_BITS(p_timer->TAMR, TIMER_TAMR_TAMRSU);
}
if (p_config->timer_a.legacy_operation)
{
SET_BITS(p_timer->TAMR, TIMER_TAMR_TAPLO);
}
switch (p_config->timer_a.event_mode)
{
case TIMER_EVENT_MODE_POSITIVE:
SET_BITS(p_timer->CTRL, TIMER_CTL_TAEVENT_POS);
break;
case TIMER_EVENT_MODE_NEGATIVE:
SET_BITS(p_timer->CTRL, TIMER_CTL_TAEVENT_NEG);
break;
case TIMER_EVENT_MODE_BOTH:
SET_BITS(p_timer->CTRL, TIMER_CTL_TAEVENT_BOTH);
break;
}
if (p_config->timer_a.stall_enable)
{
SET_BITS(p_timer->CTRL, TIMER_CTL_TASTALL);
}
if (p_config->timer_a.output_trigger_enable)
{
SET_BITS(p_timer->CTRL, TIMER_CTL_TAOTE);
}
if (p_config->timer_a.invert_pwm_output)
{
SET_BITS(p_timer->CTRL, TIMER_CTL_TAPWML);
}
if (p_config->type == TIMER_SPLIT)
{
/* Process timer B config */
switch (p_config->timer_b.type)
{
case TIMER_SPLIT_ONE_SHOT:
SET_BITS(p_timer->TBMR, TIMER_TBMR_TBMR_1_SHOT);
break;
case TIMER_SPLIT_PERIODIC:
SET_BITS(p_timer->TBMR, TIMER_TBMR_TBMR_PERIOD);
break;
case TIMER_SPLIT_CAPTURE_COUNT:
SET_BITS(p_timer->TBMR, TIMER_TBMR_TBMR_CAP);
break;
case TIMER_SPLIT_CAPTURE_TIME:
SET_BITS(p_timer->TBMR, TIMER_TBMR_TBMR_CAP);
SET_BITS(p_timer->TBMR, TIMER_TBMR_TBCMR);
break;
case TIMER_SPLIT_PWM:
SET_BITS(p_timer->TBMR, TIMER_TBMR_TBMR_PERIOD);
SET_BITS(p_timer->TBMR, TIMER_TBMR_TBAMS);
break;
}
if (p_config->timer_b.count_up)
{
SET_BITS(p_timer->TBMR, TIMER_TBMR_TBCDIR);
}
if (p_config->timer_b.match_interrupt)
{
SET_BITS(p_timer->TBMR, TIMER_TBMR_TBMIE);
}
if (p_config->timer_b.wait_on_trigger)
{
SET_BITS(p_timer->TBMR, TIMER_TBMR_TBWOT);
}
if (p_config->timer_b.snap_shot_mode)
{
SET_BITS(p_timer->TBMR, TIMER_TBMR_TBSNAPS);
}
if (p_config->timer_b.interval_load_write)
{
SET_BITS(p_timer->TBMR, TIMER_TBMR_TBILD);
}
if (p_config->timer_b.pwm_interrupt)
{
SET_BITS(p_timer->TBMR, TIMER_TBMR_TBPWMIE);
}
if (p_config->timer_b.match_register_update)
{
SET_BITS(p_timer->TBMR, TIMER_TBMR_TBMRSU);
}
if (p_config->timer_b.legacy_operation)
{
SET_BITS(p_timer->TBMR, TIMER_TBMR_TBPLO);
}
switch (p_config->timer_b.event_mode)
{
case TIMER_EVENT_MODE_POSITIVE:
SET_BITS(p_timer->CTRL, TIMER_CTL_TBEVENT_POS);
break;
case TIMER_EVENT_MODE_NEGATIVE:
SET_BITS(p_timer->CTRL, TIMER_CTL_TBEVENT_NEG);
break;
case TIMER_EVENT_MODE_BOTH:
SET_BITS(p_timer->CTRL, TIMER_CTL_TBEVENT_BOTH);
break;
}
if (p_config->timer_b.stall_enable)
{
SET_BITS(p_timer->CTRL, TIMER_CTL_TBSTALL);
}
if (p_config->timer_b.output_trigger_enable)
{
SET_BITS(p_timer->CTRL, TIMER_CTL_TBOTE);
}
if (p_config->timer_b.invert_pwm_output)
{
SET_BITS(p_timer->CTRL, TIMER_CTL_TBPWML);
}
}
if (p_config->rtc_stall_enable)
{
SET_BITS(p_timer->CTRL, TIMER_CTL_RTCEN);
}
}
/**
\brief Cancel a running compare.
*/
void bsp_timer_cancel_schedule() {
timer_reset_compare(TIMER_NUM2,TIMER_COMPARE_REG0);
timer_disable(TIMER_NUM2);
}
