static void tnetw1130_init(pci_tnetw1130_t *d, NICInfo * nd)
{
tnetw1130_t *s = &d->tnetw1130;
/* TI TNETW1130 */
tnetw1130_pci_config(d->dev.config);
/* Handler for memory-mapped I/O */
s->io_memory[0] =
cpu_register_io_memory(0, tnetw1130_region0_read, tnetw1130_region0_write, d);
s->io_memory[1] =
cpu_register_io_memory(0, tnetw1130_region1_read, tnetw1130_region1_write, d);
TRACE(TNETW, logout("io_memory = 0x%08x, 0x%08x\n", s->io_memory[0], s->io_memory[1]));
pci_register_io_region(&d->dev, 0, TNETW1130_MEM0_SIZE,
PCI_ADDRESS_SPACE_MEM, tnetw1130_mem_map);
pci_register_io_region(&d->dev, 1, TNETW1130_MEM1_SIZE,
PCI_ADDRESS_SPACE_MEM, tnetw1130_mem_map);
static const char macaddr[6] = {
0x00, 0x60, 0x65, 0x02, 0x4a, 0x8e
};
memcpy(s->macaddr, macaddr, 6);
//~ memcpy(s->macaddr, nd->macaddr, 6);
tnetw1130_reset(s);
s->vc = qemu_new_vlan_client(nd->vlan, nd->model, nd->name,
tnetw1130_receive, tnetw1130_can_receive,
tnetw1130_cleanup, s);
qemu_format_nic_info_str(s->vc, s->macaddr);
qemu_register_reset(nic_reset, d);
register_savevm("tnetw1130", tnetw1130_instance, tnetw1130_version,
tnetw1130_save, tnetw1130_load, d);
}
void vlynq_tnetw1130_init(void)
{
pci_tnetw1130_t *d = &vlynq;
uint8_t *pci_conf = d->dev.config;
tnetw1130_t *s = &d->tnetw1130;
#if defined(DEBUG_TNETW1130)
set_traceflags("DEBUG_AR7");
#endif
TRACE(TNETW, logout("\n"));
/* TI TNETW1130 */
tnetw1130_pci_config(pci_conf);
/* Handler for memory-mapped I/O */
s->io_memory[0] =
cpu_register_io_memory(0, tnetw1130_region0_read, tnetw1130_region0_write, d);
s->io_memory[1] =
cpu_register_io_memory(0, tnetw1130_region1_read, tnetw1130_region1_write, d);
TRACE(TNETW, logout("io_memory = 0x%08x, 0x%08x\n", s->io_memory[0], s->io_memory[1]));
pci_register_io_region(&d->dev, 0, TNETW1130_MEM0_SIZE,
PCI_ADDRESS_SPACE_MEM, tnetw1130_mem_map);
pci_register_io_region(&d->dev, 1, TNETW1130_MEM1_SIZE,
PCI_ADDRESS_SPACE_MEM, tnetw1130_mem_map);
memcpy(s->mem1 + 0x0001f000, pci_conf, 64);
/* eCPU is halted. */
reg_write16(s->mem0, TNETW1130_ECPU_CTRL, 1);
//~ tnetw1130_mem_map(&d->dev, 0, 0x04000000, 0x22000, 0); /* 0xf0000000 */
//~ tnetw1130_mem_map(&d->dev, 1, 0x04022000, 0x40000, 0); /* 0xc0000000 */
//~ tnetw1130_mem_map(&d->dev, 1, 0x04000000, 0x40000, 0);
//~ tnetw1130_mem_map(&d->dev, 0, 0x04040000, 0x22000, 0);
tnetw1130_mem_map(&d->dev, 0, 0x04000000, TNETW1130_MEM0_SIZE, 0);
tnetw1130_mem_map(&d->dev, 1, 0x04022000, TNETW1130_MEM1_SIZE, 0);
}
static int tnetw1130_init(PCIDevice *pci_dev)
{
TNETW1130State *d = DO_UPCAST(TNETW1130State, dev, pci_dev);
tnetw1130_t *s = &d->tnetw1130;
/* TI TNETW1130 */
tnetw1130_pci_config(d->dev.config);
/* Handler for memory-mapped I/O */
memory_region_init_io(&d->mmio_bar0, &tnetw1130_ops0, s, "tnetw1130_mmio0",
TNETW1130_MEM0_SIZE);
memory_region_init_io(&d->mmio_bar1, &tnetw1130_ops1, s, "tnetw1130_mmio1",
TNETW1130_MEM1_SIZE);
pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio_bar0);
pci_register_bar(&d->dev, 1, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio_bar1);
#if 0
static const char macaddr[6] = {
0x00, 0x60, 0x65, 0x02, 0x4a, 0x8e
};
memcpy(s->conf.macaddr.a, macaddr, 6);
#endif
qemu_macaddr_default_if_unset(&s->conf.macaddr);
tnetw1130_reset(s);
s->nic = qemu_new_nic(&net_info, &s->conf,
object_get_typename(OBJECT(pci_dev)),
pci_dev->qdev.id, s);
qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a);
qemu_register_reset(nic_reset, d);
return 0;
}
