static int dra7xx_pcie_link_up(struct pcie_port *pp) { struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pp); u32 reg = dra7xx_pcie_readl(dra7xx, PCIECTRL_DRA7XX_CONF_PHY_CS); return !!(reg & LINK_UP); }
static int dra7xx_pcie_establish_link(struct pcie_port *pp) { u32 reg; unsigned int retries = 1000; struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pp); if (dw_pcie_link_up(pp)) { dev_err(pp->dev, "link is already up\n"); return 0; } reg = dra7xx_pcie_readl(dra7xx, PCIECTRL_DRA7XX_CONF_DEVICE_CMD); reg |= LTSSM_EN; dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_DEVICE_CMD, reg); while (retries--) { reg = dra7xx_pcie_readl(dra7xx, PCIECTRL_DRA7XX_CONF_PHY_CS); if (reg & LINK_UP) break; usleep_range(10, 20); } if (retries == 0) { dev_err(pp->dev, "link is not up\n"); return -ETIMEDOUT; } return 0; }
static int dra7xx_pcie_establish_link(struct pcie_port *pp) { struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pp); u32 reg; if (dw_pcie_link_up(pp)) { dev_err(pp->dev, "link is already up\n"); return 0; } reg = dra7xx_pcie_readl(dra7xx, PCIECTRL_DRA7XX_CONF_DEVICE_CMD); reg |= LTSSM_EN; dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_DEVICE_CMD, reg); return dw_pcie_wait_for_link(pp); }
static void dra7xx_pcie_enable_interrupts(struct pcie_port *pp) { struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pp); dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MAIN, ~INTERRUPTS); dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQENABLE_SET_MAIN, INTERRUPTS); dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI, ~LEG_EP_INTERRUPTS & ~MSI); if (IS_ENABLED(CONFIG_PCI_MSI)) dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQENABLE_SET_MSI, MSI); else dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQENABLE_SET_MSI, LEG_EP_INTERRUPTS); }
static irqreturn_t dra7xx_pcie_msi_irq_handler(int irq, void *arg) { struct pcie_port *pp = arg; struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pp); u32 reg; reg = dra7xx_pcie_readl(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI); switch (reg) { case MSI: dw_handle_msi_irq(pp); break; case INTA: case INTB: case INTC: case INTD: generic_handle_irq(irq_find_mapping(pp->irq_domain, ffs(reg))); break; } dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI, reg); return IRQ_HANDLED; }