static int sii9244_power_init(struct sii9244_data *sii9244)
{
int ret;
/* Force the sii9244 into the D0 state. */
ret = tpi_write_reg(sii9244, TPI_DPD_REG, 0x3F);
if (ret < 0)
return ret;
/* Enable TxPLL Clock */
ret = hdmi_rx_write_reg(sii9244, HDMI_RX_TMDS_CLK_EN_REG, 0x01);
if (ret < 0)
return ret;
/* Enable Tx Clock Path & Equalizer*/
ret = hdmi_rx_write_reg(sii9244, HDMI_RX_TMDS_CH_EN_REG, 0x15);
if (ret < 0)
return ret;
/* Power Up TMDS*/
ret = mhl_tx_write_reg(sii9244, 0x08, 0x35);
if (ret < 0)
return ret;
return 0;
}
static void sii9234_power_down(struct sii9234_data *sii9234)
{
if (sii9234->pdata->vbus_present)
sii9234->pdata->vbus_present(false);
tpi_write_reg(sii9234, TPI_DPD_REG, 0);
/*turn on&off hpd festure for only QCT HDMI*/
}
static void sii9244_power_down(struct sii9244_data *sii9244)
{
if (sii9244->claimed)
sii9234_vbus_present(false);
sii9244->state = STATE_DISCONNECTED;
sii9244->claimed = false;
tpi_write_reg(sii9244, TPI_DPD_REG, 0);
sii9244_power(sii9244, 0);
sii9244_enable(sii9244, 0);
}
void hdcp_handler(u8 intr)
{
u8 QueryData;
u8 LinkStatus;
u8 RegImage;
u8 NewLinkProtectionLevel;
IN_FUNCTION;
if (false == hdmi.connected) {
return;
}
logd("TPI_SYSTEM_CONTROL_DATA_REG(0x1A):0x%x\n", tpi_read_reg(TPI_SYSTEM_CONTROL_DATA_REG));
if (hw_support_mhl()) {
intr = tpi_read_reg(TPI_INTERRUPT_STATUS_REG);
}
logd("TPI_INTERRUPT_STATUS_REG:0x%x\n", intr);
//Clear Interrupt Status.
if (intr & (~(BIT2 | BIT3))) {
tpi_write_reg(TPI_INTERRUPT_STATUS_REG, intr & (~(BIT2 | BIT3)));
}
if (!hdcp_para.hdcp_enable) {
tpi_modify_reg(TPI_SYSTEM_CONTROL_DATA_REG, AV_MUTE_MASK, AV_MUTE_NORMAL);
logd("hdcp is not enabled.\n");
return;
}
if (!hdcp_para.tx_supports || !hdcp_para.askv_valid) {
return;
}
if ((hdcp_para.link_protection_level == (EXTENDED_LINK_PROTECTION_NONE | LOCAL_LINK_PROTECTION_NONE))
&& (!hdcp_para.started)) {
QueryData = tpi_read_reg(TPI_HDCP_QUERY_DATA_REG);
logd("TPI_HDCP_QUERY_DATA_REG(0x29): 0x%x\n", QueryData);
if (QueryData & PROTECTION_TYPE_MASK) { // Is HDCP avaialable
hdcp_on();
}
}
// Check if Link Status has changed:
if (intr & SECURITY_CHANGE_EVENT) {
logi("HDCP -> ");
LinkStatus = tpi_read_reg(TPI_HDCP_QUERY_DATA_REG);
LinkStatus &= LINK_STATUS_MASK;
switch (LinkStatus)
{
case LINK_STATUS_NORMAL:
logi("Link = Normal\n");
break;
case LINK_STATUS_LINK_LOST:
logi("Link = Lost\n");
restart_hdcp();
break;
case LINK_STATUS_RENEGOTIATION_REQ:
logi("Link = Renegotiation Required\n");
restart_hdcp();
break;
case LINK_STATUS_LINK_SUSPENDED:
logi("Link = Suspended\n");
tpi_modify_reg(TPI_SYSTEM_CONTROL_DATA_REG, LINK_INTEGRITY_MODE_MASK,
LINK_INTEGRITY_DYNAMIC);
restart_hdcp();
break;
}
}
// Check if HDCP state has changed:
if (intr & HDCP_CHANGE_EVENT) {
RegImage = tpi_read_reg(TPI_HDCP_QUERY_DATA_REG);
NewLinkProtectionLevel = RegImage & (EXTENDED_LINK_PROTECTION_MASK | LOCAL_LINK_PROTECTION_MASK);
if (NewLinkProtectionLevel != hdcp_para.link_protection_level) {
logi("HDCP -> ");
hdcp_para.link_protection_level = NewLinkProtectionLevel;
switch (hdcp_para.link_protection_level)
{
case (EXTENDED_LINK_PROTECTION_NONE | LOCAL_LINK_PROTECTION_NONE):
logi("Protection = None\n");
hdcp_para.hdcp_notify(HDCP_AUTH_FAILED);
break;
case LOCAL_LINK_PROTECTION_SECURE:
hdcp_para.hdcp_notify(HDCP_AUTH_SUCCESS);
tpi_modify_reg(TPI_SYSTEM_CONTROL_DATA_REG, AV_MUTE_MASK, AV_MUTE_NORMAL);
logi("Protection = Local, Video Unmuted\n");
break;
case (EXTENDED_LINK_PROTECTION_SECURE | LOCAL_LINK_PROTECTION_SECURE):
hdcp_para.hdcp_notify(HDCP_AUTH_SUCCESS);
logi("Protection = Extended\n");
tpi_modify_reg(TPI_SYSTEM_CONTROL_DATA_REG, AV_MUTE_MASK, AV_MUTE_NORMAL);
break;
default:
hdcp_para.hdcp_notify(HDCP_AUTH_FAILED);
logi("Protection = Extended but not Local?\n");
break;
}
}
}
OUT_FUNCTION;
}
static int sii9234_30pin_reg_init_for_9290(struct sii9234_data *sii9234)
{
int ret = 0;
u8 value;
pr_info("[: %s]++\n", __func__);
ret = tpi_write_reg(sii9234, 0x3D, 0x3F);
if (ret < 0)
return ret;
ret = hdmi_rx_write_reg(sii9234, 0x11, 0x01);
if (ret < 0)
return ret;
ret = hdmi_rx_write_reg(sii9234, 0x12, 0x15);
if (ret < 0)
return ret;
ret = mhl_tx_write_reg(sii9234, 0x08, 0x35);
if (ret < 0)
return ret;
ret = hdmi_rx_write_reg(sii9234, 0x00, 0x00);
if (ret < 0)
return ret;
ret = hdmi_rx_write_reg(sii9234, 0x13, 0x60);
if (ret < 0)
return ret;
ret = hdmi_rx_write_reg(sii9234, 0x14, 0xF0);
if (ret < 0)
return ret;
ret = hdmi_rx_write_reg(sii9234, 0x4B, 0x06);
if (ret < 0)
return ret;
/* Analog PLL Control */
ret = hdmi_rx_write_reg(sii9234, 0x17, 0x07);
if (ret < 0)
return ret;
ret = hdmi_rx_write_reg(sii9234, 0x1A, 0x20);
if (ret < 0)
return ret;
ret = hdmi_rx_write_reg(sii9234, 0x22, 0xE0);
if (ret < 0)
return ret;
ret = hdmi_rx_write_reg(sii9234, 0x23, 0xC0);
if (ret < 0)
return ret;
ret = hdmi_rx_write_reg(sii9234, 0x24, 0xA0);
if (ret < 0)
return ret;
ret = hdmi_rx_write_reg(sii9234, 0x25, 0x80);
if (ret < 0)
return ret;
ret = hdmi_rx_write_reg(sii9234, 0x26, 0x60);
if (ret < 0)
return ret;
ret = hdmi_rx_write_reg(sii9234, 0x27, 0x40);
if (ret < 0)
return ret;
ret = hdmi_rx_write_reg(sii9234, 0x28, 0x20);
if (ret < 0)
return ret;
ret = hdmi_rx_write_reg(sii9234, 0x29, 0x00);
if (ret < 0)
return ret;
ret = hdmi_rx_write_reg(sii9234, 0x4D, 0x02);
if (ret < 0)
return ret;
ret = hdmi_rx_write_reg(sii9234, 0x4C, 0xA0);
if (ret < 0)
return ret;
ret = mhl_tx_write_reg(sii9234, 0x80, 0x34);
if (ret < 0)
return ret;
ret = hdmi_rx_write_reg(sii9234, 0x31, 0x0B);
if (ret < 0)
return ret;
ret = hdmi_rx_write_reg(sii9234, 0x45, 0x06);
if (ret < 0)
return ret;
ret = mhl_tx_write_reg(sii9234, 0xA0, 0xD0);
if (ret < 0)
return ret;
ret = mhl_tx_write_reg(sii9234, 0xA1, 0xFC);
if (ret < 0)
return ret;
ret = mhl_tx_write_reg(sii9234, 0xA3 /*MHL_TX_MHLTX_CTL4_REG*/,
sii9234->pdata->swing_level);
if (ret < 0)
return ret;
ret = mhl_tx_write_reg(sii9234, 0xA6, 0x00);
if (ret < 0)
return ret;
ret = mhl_tx_write_reg(sii9234, 0x2B, 0x01);
if (ret < 0)
return ret;
/* CBUS & Discovery */
ret = mhl_tx_read_reg(sii9234, 0x90/*MHL_TX_DISC_CTRL1_REG*/, &value);
if (ret < 0)
return ret;
value &= ~(1<<2);
value |= (1<<3);
ret = mhl_tx_write_reg(sii9234, 0x90 /*MHL_TX_DISC_CTRL1_REG*/, value);
if (ret < 0)
return ret;
ret = mhl_tx_write_reg(sii9234, 0x91, 0xE5);
if (ret < 0)
return ret;
ret = mhl_tx_write_reg(sii9234, 0x94, 0x66);
if (ret < 0)
return ret;
ret = cbus_read_reg(sii9234, 0x31, &value);
if (ret < 0)
return ret;
value |= 0x0C;
if (ret < 0)
return ret;
ret = cbus_write_reg(sii9234, 0x31, value);
if (ret < 0)
return ret;
ret = mhl_tx_write_reg(sii9234, 0xA5, 0x80);
if (ret < 0)
return ret;
ret = mhl_tx_write_reg(sii9234, 0x95, 0x31);
if (ret < 0)
return ret;
ret = mhl_tx_write_reg(sii9234, 0x96, 0x22);
if (ret < 0)
return ret;
ret = mhl_tx_read_reg(sii9234, 0x95/*MHL_TX_DISC_CTRL6_REG*/, &value);
if (ret < 0)
return ret;
value |= (1<<6);
ret = mhl_tx_write_reg(sii9234, 0x95/*MHL_TX_DISC_CTRL6_REG*/, value);
if (ret < 0)
return ret;
ret = mhl_tx_write_reg(sii9234, 0x92, 0x46);
if (ret < 0)
return ret;
ret = mhl_tx_write_reg(sii9234, 0x93, 0xDC);
if (ret < 0)
return ret;
/*0x79=MHL_TX_INT_CTRL_REG*/
ret = mhl_tx_clear_reg(sii9234, 0x79, (1<<2) | (1<<1));
if (ret < 0)
return ret;
mdelay(25);
/*0x95=MHL_TX_DISC_CTRL6_REG*/
ret = mhl_tx_clear_reg(sii9234, 0x95, (1<<6)/*USB_ID_OVR*/);
if (ret < 0)
return ret;
ret = mhl_tx_write_reg(sii9234, 0x90, 0x27);
if (ret < 0)
return ret;
ret = sii9234_cbus_init_for_9290(sii9234);
if (ret < 0)
return ret;
ret = mhl_tx_write_reg(sii9234, 0x05, 0x4);
if (ret < 0)
return ret;
ret = mhl_tx_write_reg(sii9234, 0x0D, 0x1C);
pr_info("[MHD: %s]--\n", __func__);
return ret;
}
