Esempi in C++ (Cpp) per tsec_local_mdio_write

Esempio n. 1

File: tsec.c Progetto: AshishNamdev/u-boot

/* Configure the TBI for SGMII operation */
static void tsec_configure_serdes(struct tsec_private *priv)
{
	/* Access TBI PHY registers at given TSEC register offset as opposed
	 * to the register offset used for external PHY accesses */
	tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa),
			0, TBI_ANA, TBIANA_SETTINGS);
	tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa),
			0, TBI_TBICON, TBICON_CLK_SELECT);
	tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa),
			0, TBI_CR, CONFIG_TSEC_TBICR_SETTINGS);
}

Esempio n. 2

File: eth.c Progetto: DavionKnight/uboot-2000

/* Configure the TBI for SGMII operation */
void dtsec_configure_serdes(struct fm_eth *priv)
{
	struct dtsec *regs = priv->mac->base;
	struct tsec_mii_mng *phyregs = priv->mac->phyregs;

	/*
	 * Access TBI PHY registers at given TSEC register offset as
	 * opposed to the register offset used for external PHY accesses
	 */
	tsec_local_mdio_write(phyregs, in_be32(&regs->tbipa), 0, TBI_TBICON,
			TBICON_CLK_SELECT);
	tsec_local_mdio_write(phyregs, in_be32(&regs->tbipa), 0, TBI_ANA,
			TBIANA_SGMII_ACK);
	tsec_local_mdio_write(phyregs, in_be32(&regs->tbipa), 0,
			TBI_CR, TBICR_SETTINGS);
}

Esempio n. 3

File: fsl_mdio.c Progetto: 0s4l/u-boot-xlnx

int tsec_phy_write(struct mii_dev *bus, int addr, int dev_addr, int regnum,
			u16 value)
{
	struct tsec_mii_mng *phyregs = bus->priv;

	tsec_local_mdio_write(phyregs, addr, dev_addr, regnum, value);

	return 0;
}

Esempio n. 4

File: eth.c Progetto: bbbLinux/u_boot

/* Configure the TBI for SGMII operation */
static void dtsec_configure_serdes(struct fm_eth *priv)
{
#ifdef CONFIG_SYS_FMAN_V3
	u32 value;
	struct mii_dev bus;
	bus.priv = priv->mac->phyregs;

	/* SGMII IF mode + AN enable */
	value = PHY_SGMII_IF_MODE_AN | PHY_SGMII_IF_MODE_SGMII;
	memac_mdio_write(&bus, 0, MDIO_DEVAD_NONE, 0x14, value);

	/* Dev ability according to SGMII specification */
	value = PHY_SGMII_DEV_ABILITY_SGMII;
	memac_mdio_write(&bus, 0, MDIO_DEVAD_NONE, 0x4, value);

	/* Adjust link timer for SGMII  -
	1.6 ms in units of 8 ns = 2 * 10^5 = 0x30d40 */
	memac_mdio_write(&bus, 0, MDIO_DEVAD_NONE, 0x13, 0x3);
	memac_mdio_write(&bus, 0, MDIO_DEVAD_NONE, 0x12, 0xd40);

	/* Restart AN */
	value = PHY_SGMII_CR_DEF_VAL | PHY_SGMII_CR_RESET_AN;
	memac_mdio_write(&bus, 0, MDIO_DEVAD_NONE, 0, value);
#else
	struct dtsec *regs = priv->mac->base;
	struct tsec_mii_mng *phyregs = priv->mac->phyregs;

	/*
	 * Access TBI PHY registers at given TSEC register offset as
	 * opposed to the register offset used for external PHY accesses
	 */
	tsec_local_mdio_write(phyregs, in_be32(&regs->tbipa), 0, TBI_TBICON,
			TBICON_CLK_SELECT);
	tsec_local_mdio_write(phyregs, in_be32(&regs->tbipa), 0, TBI_ANA,
			TBIANA_SGMII_ACK);
	tsec_local_mdio_write(phyregs, in_be32(&regs->tbipa), 0,
			TBI_CR, TBICR_SETTINGS);
#endif
}

Esempio n. 5

File: eth.c Progetto: OpenNoah/u-boot

/* Configure the TBI for SGMII operation */
static void dtsec_configure_serdes(struct fm_eth *priv)
{
#ifdef CONFIG_SYS_FMAN_V3
	u32 value;
	struct mii_dev bus;
	bus.priv = priv->mac->phyregs;
	bool sgmii_2500 = (priv->enet_if ==
			PHY_INTERFACE_MODE_SGMII_2500) ? true : false;
	int i = 0;

qsgmii_loop:
	/* SGMII IF mode + AN enable only for 1G SGMII, not for 2.5G */
	if (sgmii_2500)
		value = PHY_SGMII_CR_PHY_RESET |
			PHY_SGMII_IF_SPEED_GIGABIT |
			PHY_SGMII_IF_MODE_SGMII;
	else
		value = PHY_SGMII_IF_MODE_SGMII | PHY_SGMII_IF_MODE_AN;

	memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x14, value);

	/* Dev ability according to SGMII specification */
	value = PHY_SGMII_DEV_ABILITY_SGMII;
	memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x4, value);

	if (sgmii_2500) {
		/* Adjust link timer for 2.5G SGMII,
		 * 1.6 ms in units of 3.2 ns:
		 * 1.6ms / 3.2ns = 5 * 10^5 = 0x7a120.
		 */
		memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x13, 0x0007);
		memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x12, 0xa120);
	} else {
		/* Adjust link timer for SGMII,
		 * 1.6 ms in units of 8 ns:
		 * 1.6ms / 8ns = 2 * 10^5 = 0x30d40.
		 */
		memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x13, 0x0003);
		memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x12, 0x0d40);
	}

	/* Restart AN */
	value = PHY_SGMII_CR_DEF_VAL | PHY_SGMII_CR_RESET_AN;
	memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0, value);

	if ((priv->enet_if == PHY_INTERFACE_MODE_QSGMII) && (i < 3)) {
		i++;
		goto qsgmii_loop;
	}
#else
	struct dtsec *regs = priv->mac->base;
	struct tsec_mii_mng *phyregs = priv->mac->phyregs;

	/*
	 * Access TBI PHY registers at given TSEC register offset as
	 * opposed to the register offset used for external PHY accesses
	 */
	tsec_local_mdio_write(phyregs, in_be32(&regs->tbipa), 0, TBI_TBICON,
			TBICON_CLK_SELECT);
	tsec_local_mdio_write(phyregs, in_be32(&regs->tbipa), 0, TBI_ANA,
			TBIANA_SGMII_ACK);
	tsec_local_mdio_write(phyregs, in_be32(&regs->tbipa), 0,
			TBI_CR, TBICR_SETTINGS);
#endif
}