/* Initialisation entry point for this PHY driver */
static int txc43128_phy_init(struct efx_nic *efx)
{
u32 devid;
int rc;
devid = efx_mdio_read_id(efx, MDIO_MMD_PHYXS);
EFX_INFO(efx, ""TXCNAME ": PHY ID reg %x (OUI %06x model %02x "
"revision %x)\n", devid, efx_mdio_id_oui(devid),
efx_mdio_id_model(devid), efx_mdio_id_rev(devid));
EFX_INFO(efx, ""TXCNAME ": Silicon ID %x\n",
efx_mdio_read(efx, MDIO_MMD_PHYXS, TXC_GLRGS_SLID) &
TXC_GLRGS_SLID_MASK);
rc = txc_reset_phy(efx);
if (rc < 0)
return rc;
rc = txc_bist(efx);
if (rc < 0)
return rc;
txc_apply_defaults(efx);
return 0;
}
static int txc43128_run_tests(struct efx_nic *efx, int *results, unsigned flags)
{
int rc;
if (!(flags & ETH_TEST_FL_OFFLINE))
return 0;
rc = txc_reset_phy(efx);
if (rc < 0)
return rc;
rc = txc_bist(efx);
txc_apply_defaults(efx);
results[0] = rc ? -1 : 1;
return rc;
}
/* Initialisation entry point for this PHY driver */
static int txc43128_phy_init(struct efx_nic *efx)
{
int rc;
rc = txc_reset_phy(efx);
if (rc < 0)
return rc;
rc = txc_bist(efx);
if (rc < 0)
return rc;
txc_apply_defaults(efx);
return 0;
}
