void usbuart_init(void)
{
UART_PIN_SETUP();
periph_clock_enable(USBUART_CLK);
__asm__("nop"); __asm__("nop"); __asm__("nop");
uart_disable(USBUART);
/* Setup UART parameters. */
uart_clock_from_sysclk(USBUART);
uart_set_baudrate(USBUART, 38400);
uart_set_databits(USBUART, 8);
uart_set_stopbits(USBUART, 1);
uart_set_parity(USBUART, UART_PARITY_NONE);
// Enable FIFO
uart_enable_fifo(USBUART);
// Set FIFO interrupt trigger levels to 1/8 full for RX buffer and
// 7/8 empty (1/8 full) for TX buffer
uart_set_fifo_trigger_levels(USBUART, UART_FIFO_RX_TRIG_1_8, UART_FIFO_TX_TRIG_7_8);
uart_clear_interrupt_flag(USBUART, UART_INT_RX | UART_INT_RT);
/* Enable interrupts */
uart_enable_interrupts(UART0, UART_INT_RX| UART_INT_RT);
/* Finally enable the USART. */
uart_enable(USBUART);
//nvic_set_priority(USBUSART_IRQ, IRQ_PRI_USBUSART);
nvic_enable_irq(USBUART_IRQ);
}
static void dmx_start_data(void) {
switch (dmx_port_direction) {
case DMX_PORT_DIRECTION_OUTP:
dmx_send_always = true;
dmx_send_state = IDLE;
uart_enable_fifo();
__enable_fiq();
irq_timer_set(IRQ_TIMER_0, irq_timer0_dmx_sender);
const uint32_t clo = h3_hs_timer_lo_us();
if (clo - dmx_send_break_micros > dmx_output_period) {
H3_TIMER->TMR0_CTRL |= TIMER_CTRL_SINGLE_MODE;
H3_TIMER->TMR0_INTV = 4 * 12;
H3_TIMER->TMR0_CTRL |= (TIMER_CTRL_EN_START | TIMER_CTRL_RELOAD); // 0x3;
} else {
H3_TIMER->TMR0_CTRL |= TIMER_CTRL_SINGLE_MODE;
H3_TIMER->TMR0_INTV = (dmx_output_period + 4) * 12;
H3_TIMER->TMR0_CTRL |= (TIMER_CTRL_EN_START | TIMER_CTRL_RELOAD); // 0x3;
}
isb();
break;
case DMX_PORT_DIRECTION_INP:
dmx_receive_state = IDLE;
irq_timer_set(IRQ_TIMER_0, irq_timer0_dmx_receive);
H3_TIMER->TMR0_CTRL |= TIMER_CTRL_SINGLE_MODE;
while ((EXT_UART->USR & UART_USR_BUSY) == UART_USR_BUSY) {
(void) EXT_UART->O00.RBR;
}
uart_disable_fifo();
__enable_fiq();
isb();
break;
default:
break;
}
is_stopped = false;
}
void traceswo_init(void)
{
periph_clock_enable(RCC_GPIOD);
periph_clock_enable(TRACEUART_CLK);
__asm__("nop"); __asm__("nop"); __asm__("nop");
gpio_mode_setup(SWO_PORT, GPIO_MODE_INPUT, GPIO_PUPD_NONE, SWO_PIN);
gpio_set_af(SWO_PORT, 1, SWO_PIN); /* U2RX */
uart_disable(TRACEUART);
/* Setup UART parameters. */
uart_clock_from_sysclk(TRACEUART);
uart_set_baudrate(TRACEUART, 800000);
uart_set_databits(TRACEUART, 8);
uart_set_stopbits(TRACEUART, 1);
uart_set_parity(TRACEUART, UART_PARITY_NONE);
// Enable FIFO
uart_enable_fifo(TRACEUART);
// Set FIFO interrupt trigger levels to 4/8 full for RX buffer and
// 7/8 empty (1/8 full) for TX buffer
uart_set_fifo_trigger_levels(TRACEUART, UART_FIFO_RX_TRIG_1_2, UART_FIFO_TX_TRIG_7_8);
uart_clear_interrupt_flag(TRACEUART, UART_INT_RX | UART_INT_RT);
/* Enable interrupts */
uart_enable_interrupts(TRACEUART, UART_INT_RX | UART_INT_RT);
/* Finally enable the USART. */
uart_enable(TRACEUART);
nvic_set_priority(TRACEUART_IRQ, 0);
nvic_enable_irq(TRACEUART_IRQ);
/* Un-stall USB endpoint */
usbd_ep_stall_set(usbdev, 0x85, 0);
gpio_mode_setup(GPIOD, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO3);
}
int uart_ioctl(struct inode * inode, struct file * filp, unsigned int cmd, unsigned long arg)
{
DPRINT(cmd);
DPRINT(arg);
#define UART_SET_BUAD_RATE 0
#define UART_ENABLE_FIFO 1
switch (cmd)
{
case UART_SET_BUAD_RATE:
uart_set_baudrate(arg);
break;
case UART_ENABLE_FIFO:
uart_enable_fifo();
break;
}
return 0;
}
