void
i8250console(void)
{
Uart *uart;
int n;
char *cmd, *p;
if((p = getconf("console")) == nil)
return;
n = strtoul(p, &cmd, 0);
if(p == cmd)
return;
switch(n){
default:
return;
case 0:
uart = &i8250uart[0];
break;
case 1:
uart = &i8250uart[1];
break;
}
uartctl(uart, "b9600 l8 pn s1");
if(*cmd != '\0')
uartctl(uart, cmd);
(*uart->phys->enable)(uart, 0);
consuart = uart;
uart->console = 1;
}
void
uartconsinit(void)
{
Uart *uart;
int n;
char *p, *cmd;
if((p = getconf("console")) == nil)
return;
n = strtoul(p, &cmd, 0);
if(p == cmd)
return;
switch(n){
default:
return;
case 0:
uart = &miniuart;
break;
}
if(!uart->enabled)
(*uart->phys->enable)(uart, 0);
uartctl(uart, "b9600 l8 pn s1");
if(*cmd != '\0')
uartctl(uart, cmd);
consuart = uart;
uart->console = 1;
}
/*
* enable/disable uart and add/remove to list of enabled uarts
*/
static Uart*
uartenable(Uart *p)
{
Uart **l;
if(p->iq == nil){
if((p->iq = qopen(8*1024, 0, uartflow, p)) == nil)
return nil;
}
else
qreopen(p->iq);
if(p->oq == nil){
if((p->oq = qopen(8*1024, 0, uartkick, p)) == nil){
qfree(p->iq);
p->iq = nil;
return nil;
}
}
else
qreopen(p->oq);
p->ir = p->istage;
p->iw = p->istage;
p->ie = &p->istage[Stagesize];
p->op = p->ostage;
p->oe = p->ostage;
p->hup_dsr = p->hup_dcd = 0;
p->dsr = p->dcd = 0;
/* assume we can send */
p->cts = 1;
p->ctsbackoff = 0;
if(p->bits == 0)
uartctl(p, "l8");
if(p->stop == 0)
uartctl(p, "s1");
if(p->parity == 0)
uartctl(p, "pn");
if(p->baud == 0)
uartctl(p, "b9600");
(*p->phys->enable)(p, 1);
lock(&uartalloc.Lock);
for(l = &uartalloc.elist; *l; l = &(*l)->elist){
if(*l == p)
break;
}
if(*l == 0){
p->elist = uartalloc.elist;
uartalloc.elist = p;
}
p->enabled = 1;
unlock(&uartalloc.Lock);
return p;
}
Uart*
i8250console(char* cfg)
{
int i;
Uart *uart;
Ctlr *ctlr;
char *cmd, *p;
/*
* Before i8250pnp() is run can only set the console
* to 0 or 1 because those are the only uart structs which
* will be the same before and after that.
*/
if((p = getconf("console")) == nil && (p = cfg) == nil)
return nil;
i = strtoul(p, &cmd, 0);
if(p == cmd)
return nil;
if((uart = uartconsole(i, cmd)) != nil){
consuart = uart;
return uart;
}
switch(i){
default:
return nil;
case 0:
uart = &i8250uart[0];
break;
case 1:
uart = &i8250uart[1];
break;
}
/*
* Does it exist?
* Should be able to write/read
* the Scratch Pad.
*/
ctlr = uart->regs;
csr8o(ctlr, Scr, 0x55);
if(csr8r(ctlr, Scr) != 0x55)
return nil;
(*uart->phys->enable)(uart, 0);
uartctl(uart, "b9600 l8 pn s1 i1");
if(*cmd != '\0')
uartctl(uart, cmd);
consuart = uart;
uart->console = 1;
return uart;
}
static long
uartwrite(Chan *c, void *buf, long n, vlong offset)
{
Uart *p;
char cmd[32];
USED(offset);
if(c->qid.type & QTDIR)
error(Eperm);
p = uart[NETID(c->qid.path)];
switch(NETTYPE(c->qid.path)){
case Ndataqid:
return qwrite(p->oq, buf, n);
case Nctlqid:
if(n >= sizeof(cmd))
n = sizeof(cmd)-1;
memmove(cmd, buf, n);
cmd[n] = 0;
uartctl(p, cmd);
return n;
}
}
void
uartconsole(void)
{
Uart *uart;
uart = &ks8695_uart[0];
(*uart->phys->enable)(uart, 0);
uartctl(uart, "b38400 l8 pn s1");
consuart = uart;
uart->console = 1;
}
void
uartconsinit(void)
{
Uart *uart;
uart = &miniuart;
if(!uart->enabled)
(*uart->phys->enable)(uart, 0);
uartctl(uart, "b9600 l8 pn s1");
consuart = uart;
uart->console = 1;
}
static int32_t
uartwrite(Chan *c, void *buf, int32_t n, int64_t mm)
{
Proc *up = externup();
Uart *p;
char *cmd;
if(c->qid.type & QTDIR)
error(Eperm);
p = uart[UARTID(c->qid.path)];
switch(UARTTYPE(c->qid.path)){
case Qdata:
qlock(&p->ql);
if(waserror()){
qunlock(&p->ql);
nexterror();
}
n = qwrite(p->oq, buf, n);
qunlock(&p->ql);
poperror();
break;
case Qctl:
cmd = malloc(n+1);
memmove(cmd, buf, n);
cmd[n] = 0;
qlock(&p->ql);
if(waserror()){
qunlock(&p->ql);
free(cmd);
nexterror();
}
/* let output drain */
if(uartctl(p, cmd) < 0)
error(Ebadarg);
qunlock(&p->ql);
poperror();
free(cmd);
break;
}
return n;
}
static long
uartwrite(Chan *c, void *buf, long n, vlong)
{
Uart *p;
char *cmd;
if(c->qid.type & QTDIR)
error(Eperm);
p = uart[NETID(c->qid.path)];
switch(NETTYPE(c->qid.path)){
case Ndataqid:
qlock(p);
if(waserror()){
qunlock(p);
nexterror();
}
n = qwrite(p->oq, buf, n);
qunlock(p);
poperror();
break;
case Nctlqid:
cmd = malloc(n+1);
memmove(cmd, buf, n);
cmd[n] = 0;
qlock(p);
if(waserror()){
qunlock(p);
free(cmd);
nexterror();
}
/* let output drain */
if(uartctl(p, cmd) < 0)
error(Ebadarg);
qunlock(p);
poperror();
free(cmd);
break;
}
return n;
}
/* must call this from a process's context */
int
i8250console(void)
{
Uart *uart = &i8250uart[CONSOLE];
if (up == nil)
return -1; /* too early */
if(uartenable(uart) != nil /* && uart->console */){
// iprint("i8250console: enabling console uart\n");
serialoq = uart->oq;
uart->opens++;
consuart = uart;
}
uartctl(uart, "b115200 l8 pn r1 s1 i1");
return 0;
}
//static
Uart*
uartenable(Uart *p)
{
Uart **l;
if (up == nil)
return p; /* too soon; try again later */
// return nil;
if(p->iq == nil){
if((p->iq = qopen(8*1024, Qcoalesce, uartflow, p)) == nil)
return nil;
}
else
qreopen(p->iq);
if(p->oq == nil){
if((p->oq = qopen(8*1024, 0, uartkick, p)) == nil){
qfree(p->iq);
p->iq = nil;
return nil;
}
}
else
qreopen(p->oq);
p->ir = p->istage;
p->iw = p->istage;
p->ie = &p->istage[Stagesize];
p->op = p->ostage;
p->oe = p->ostage;
p->hup_dsr = p->hup_dcd = 0;
p->dsr = p->dcd = 0;
/* assume we can send */
p->cts = 1;
p->ctsbackoff = 0;
if (up) {
if(p->bits == 0)
uartctl(p, "l8");
if(p->stop == 0)
uartctl(p, "s1");
if(p->parity == 0)
uartctl(p, "pn");
if(p->baud == 0)
uartctl(p, "b9600");
(*p->phys->enable)(p, 1);
}
/*
* use ilock because uartclock can otherwise interrupt here
* and would hang on an attempt to lock uartalloc.
*/
ilock(&uartalloc);
for(l = &uartalloc.elist; *l; l = &(*l)->elist){
if(*l == p)
break;
}
if(*l == 0){
p->elist = uartalloc.elist;
uartalloc.elist = p;
}
p->enabled = 1;
iunlock(&uartalloc);
return p;
}
