void usb_init()
{
struct uhci_controller *uhci;
uhci = uhci_init();
(void)uhci;
}
// Check if need companion controllers for full/low speed devices
static void
ehci_note_port(struct usb_ehci_s *cntl)
{
if (--cntl->checkports)
// Ports still being detected.
return;
if (! cntl->legacycount)
// No full/low speed devices found.
return;
// Start companion controllers.
int i;
for (i=0; i<ARRAY_SIZE(cntl->companion); i++) {
struct pci_device *pci = cntl->companion[i];
if (!pci)
break;
// ohci/uhci_init call pci_config_XXX - don't run from irq handler.
wait_preempt();
if (pci_classprog(pci) == PCI_CLASS_SERIAL_USB_UHCI)
uhci_init(pci, cntl->usb.busid + i);
else if (pci_classprog(pci) == PCI_CLASS_SERIAL_USB_OHCI)
ohci_init(pci, cntl->usb.busid + i);
}
}
void
uhci_pci_attach_deferred(struct device *self)
{
struct uhci_pci_softc *sc = (struct uhci_pci_softc *)self;
char *devname = sc->sc.sc_bus.bdev.dv_xname;
usbd_status r;
int s;
s = splhardusb();
sc->sc.sc_bus.dying = 0;
r = uhci_init(&sc->sc);
if (r != USBD_NORMAL_COMPLETION) {
printf("%s: init failed, error=%d\n", devname, r);
goto unmap_ret;
}
splx(s);
/* Attach usb device. */
sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus,
usbctlprint);
return;
unmap_ret:
bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
splx(s);
}
static void process_uhci(struct pci_address* addr, pci_device* dev)
{
uint8_t revision = pci_read_byte(addr, 0x60);
if(revision != UHCI_REV_1_0) {
// This host controller indicates that it supports a version
// of the USB specification that is *not* 1.0. Ignore it
KWARN("Detected UHCI with unsupported revision, ignoring...");
return;
}
// Bit 0 indicates whether it's memory mapped or port I/O
bool memory_mapped = (dev->base_addr4 & 0x1) == 1;
// Beore we initialize the card, make sure the cards I/O is disabled
uint16_t cmd = pci_read_word(addr, PCI_COMMAND_REG_OFFSET);
cmd = (cmd & ~0x1);
pci_write_word(addr, PCI_COMMAND_REG_OFFSET, cmd);
// THe USB book I'm reading is telling me to null out the
// capabilities register as well as the two registers marked as "reserved"
// Not sure why, TODO: Investigate! :-S
pci_write_dword(addr, PCI_CAPS_OFF_REG_OFFSET, 0x00000000);
pci_write_dword(addr, 0x38, 0x00000000);
// Set the IRQ
pci_write_byte(addr, PCI_IRQ_REG_OFFSET, UHCI_IRQ);
// Now try to get the size of the address space
//uint32_t size = pci_device_get_memory_size(addr, PCI_BASE_ADDR4_REG_OFFSET);
// Enable bus mastering and I/O access
pci_write_word(addr, 0x04, memory_mapped ? 0x06 : 0x05);
// Disable legacy support and clear current status
pci_write_word(addr, PCI_LEG_SUP_REG_OFFSET,
PCI_LEGACY_PTS | // Clear Sequence ended bit
PCI_LEGACY_TBY64W | PCI_LEGACY_TBY64R | PCI_LEGACY_TBY60W | PCI_LEGACY_TBY60R); // Clear status
// The device is now ready for the UHCI driver to take over
uhci_init(dev->base_addr4, dev, addr, UHCI_IRQ);
}
static void
uhci_pci_attach(device_t parent, device_t self, void *aux)
{
struct uhci_pci_softc *sc = device_private(self);
struct pci_attach_args *pa = (struct pci_attach_args *)aux;
pci_chipset_tag_t pc = pa->pa_pc;
pcitag_t tag = pa->pa_tag;
char const *intrstr;
pci_intr_handle_t ih;
pcireg_t csr;
usbd_status r;
int s;
char intrbuf[PCI_INTRSTR_LEN];
sc->sc.sc_dev = self;
sc->sc.sc_bus.hci_private = sc;
pci_aprint_devinfo(pa, NULL);
/* Map I/O registers */
if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
&sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) {
aprint_error_dev(self, "can't map i/o space\n");
return;
}
/*
* Disable interrupts, so we don't get any spurious ones.
* Acknowledge all pending interrupts.
*/
bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0);
bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_STS,
bus_space_read_2(sc->sc.iot, sc->sc.ioh, UHCI_STS));
sc->sc_pc = pc;
sc->sc_tag = tag;
sc->sc.sc_bus.dmatag = pa->pa_dmat;
/* Enable the device. */
csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
csr | PCI_COMMAND_MASTER_ENABLE);
/* Map and establish the interrupt. */
if (pci_intr_map(pa, &ih)) {
aprint_error_dev(self, "couldn't map interrupt\n");
return;
}
intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, uhci_intr, sc);
if (sc->sc_ih == NULL) {
aprint_error_dev(self, "couldn't establish interrupt");
if (intrstr != NULL)
aprint_error(" at %s", intrstr);
aprint_error("\n");
return;
}
aprint_normal_dev(self, "interrupting at %s\n", intrstr);
/*
* Set LEGSUP register to its default value.
* This can re-enable or trigger interrupts, so protect against
* them and explicitly disable and ACK them afterwards.
*/
s = splhardusb();
pci_conf_write(pc, tag, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN);
bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0);
bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_STS,
bus_space_read_2(sc->sc.iot, sc->sc.ioh, UHCI_STS));
splx(s);
switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) {
case PCI_USBREV_PRE_1_0:
sc->sc.sc_bus.usbrev = USBREV_PRE_1_0;
break;
case PCI_USBREV_1_0:
sc->sc.sc_bus.usbrev = USBREV_1_0;
break;
case PCI_USBREV_1_1:
sc->sc.sc_bus.usbrev = USBREV_1_1;
break;
default:
sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
break;
}
/* Figure out vendor for root hub descriptor. */
sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id);
pci_findvendor(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor),
sc->sc.sc_id_vendor);
r = uhci_init(&sc->sc);
if (r != USBD_NORMAL_COMPLETION) {
aprint_error_dev(self, "init failed, error=%d\n", r);
return;
}
sc->sc_initialized = SC_INIT_UHCI;
#if NEHCI > 0
usb_pci_add(&sc->sc_pci, pa, self);
#endif
if (!pmf_device_register(self, uhci_suspend, uhci_pci_resume))
aprint_error_dev(self, "couldn't establish power handler\n");
else
sc->sc_initialized |= SC_INIT_PMF;
/* Attach usb device. */
sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint);
}
static void
uhci_cardbus_attach(device_t parent, device_t self,
void *aux)
{
struct uhci_cardbus_softc *sc = device_private(self);
struct cardbus_attach_args *ca = (struct cardbus_attach_args *)aux;
cardbus_devfunc_t ct = ca->ca_ct;
cardbus_chipset_tag_t cc = ct->ct_cc;
cardbus_function_tag_t cf = ct->ct_cf;
pcitag_t tag = ca->ca_tag;
pcireg_t csr;
const char *vendor;
const char *devname = device_xname(self);
char devinfo[256];
usbd_status r;
sc->sc.sc_dev = self;
sc->sc.sc_bus.hci_private = sc;
pci_devinfo(ca->ca_id, ca->ca_class, 0, devinfo, sizeof(devinfo));
printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(ca->ca_class));
/* Map I/O registers */
if (Cardbus_mapreg_map(ct, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
&sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) {
printf("%s: can't map i/o space\n", devname);
return;
}
sc->sc_cc = cc;
sc->sc_cf = cf;
sc->sc_ct = ct;
sc->sc_tag = tag;
sc->sc.sc_bus.dmatag = ca->ca_dmat;
/* Enable the device. */
csr = Cardbus_conf_read(ct, tag, PCI_COMMAND_STATUS_REG);
Cardbus_conf_write(ct, tag, PCI_COMMAND_STATUS_REG,
csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE);
/* Disable interrupts, so we don't get any spurious ones. */
bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0);
/* Map and establish the interrupt. */
sc->sc_ih = Cardbus_intr_establish(ct, IPL_USB, uhci_intr, sc);
if (sc->sc_ih == NULL) {
printf("%s: couldn't establish interrupt\n", devname);
return;
}
/* Set LEGSUP register to its default value. */
Cardbus_conf_write(ct, tag, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN);
switch(Cardbus_conf_read(ct, tag, PCI_USBREV) & PCI_USBREV_MASK) {
case PCI_USBREV_PRE_1_0:
sc->sc.sc_bus.usbrev = USBREV_PRE_1_0;
break;
case PCI_USBREV_1_0:
sc->sc.sc_bus.usbrev = USBREV_1_0;
break;
case PCI_USBREV_1_1:
sc->sc.sc_bus.usbrev = USBREV_1_1;
break;
default:
sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
break;
}
/* Figure out vendor for root hub descriptor. */
vendor = pci_findvendor(ca->ca_id);
sc->sc.sc_id_vendor = PCI_VENDOR(ca->ca_id);
if (vendor)
strlcpy(sc->sc.sc_vendor, vendor, sizeof(sc->sc.sc_vendor));
else
snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor),
"vendor 0x%04x", PCI_VENDOR(ca->ca_id));
r = uhci_init(&sc->sc);
if (r != USBD_NORMAL_COMPLETION) {
printf("%s: init failed, error=%d\n", devname, r);
/* Avoid spurious interrupts. */
Cardbus_intr_disestablish(ct, sc->sc_ih);
sc->sc_ih = NULL;
return;
}
#if NEHCI_CARDBUS > 0
usb_cardbus_add(&sc->sc_cardbus, ca, self);
#endif
/* Attach usb device. */
sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint);
}
static int
uhci_pci_attach(device_t self)
{
uhci_softc_t *sc = device_get_softc(self);
int rid;
int err;
/* initialise some bus fields */
sc->sc_bus.parent = self;
sc->sc_bus.devices = sc->sc_devices;
sc->sc_bus.devices_max = UHCI_MAX_DEVICES;
sc->sc_bus.dma_bits = 32;
/* get all DMA memory */
if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(self),
&uhci_iterate_hw_softc)) {
return ENOMEM;
}
sc->sc_dev = self;
pci_enable_busmaster(self);
rid = PCI_UHCI_BASE_REG;
sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_IOPORT, &rid,
RF_ACTIVE);
if (!sc->sc_io_res) {
device_printf(self, "Could not map ports\n");
goto error;
}
sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
sc->sc_io_size = rman_get_size(sc->sc_io_res);
/* disable interrupts */
bus_space_write_2(sc->sc_io_tag, sc->sc_io_hdl, UHCI_INTR, 0);
rid = 0;
sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
RF_SHAREABLE | RF_ACTIVE);
if (sc->sc_irq_res == NULL) {
device_printf(self, "Could not allocate irq\n");
goto error;
}
sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
if (!sc->sc_bus.bdev) {
device_printf(self, "Could not add USB device\n");
goto error;
}
device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
/*
* uhci_pci_match must never return NULL if uhci_pci_probe
* succeeded
*/
device_set_desc(sc->sc_bus.bdev, uhci_pci_match(self));
switch (pci_get_vendor(self)) {
case PCI_UHCI_VENDORID_INTEL:
sprintf(sc->sc_vendor, "Intel");
break;
case PCI_UHCI_VENDORID_HP:
sprintf(sc->sc_vendor, "HP");
break;
case PCI_UHCI_VENDORID_VIA:
sprintf(sc->sc_vendor, "VIA");
break;
default:
if (bootverbose) {
device_printf(self, "(New UHCI DeviceId=0x%08x)\n",
pci_get_devid(self));
}
sprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
}
switch (pci_read_config(self, PCI_USBREV, 1) & PCI_USB_REV_MASK) {
case PCI_USB_REV_PRE_1_0:
sc->sc_bus.usbrev = USB_REV_PRE_1_0;
break;
case PCI_USB_REV_1_0:
sc->sc_bus.usbrev = USB_REV_1_0;
break;
default:
/* Quirk for Parallels Desktop 4.0 */
device_printf(self, "USB revision is unknown. Assuming v1.1.\n");
sc->sc_bus.usbrev = USB_REV_1_1;
break;
}
#if (__FreeBSD_version >= 700031)
err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
NULL, (driver_intr_t *)uhci_interrupt, sc, &sc->sc_intr_hdl);
#else
err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
(driver_intr_t *)uhci_interrupt, sc, &sc->sc_intr_hdl);
#endif
if (err) {
device_printf(self, "Could not setup irq, %d\n", err);
sc->sc_intr_hdl = NULL;
goto error;
}
/*
* Set the PIRQD enable bit and switch off all the others. We don't
* want legacy support to interfere with us XXX Does this also mean
* that the BIOS won't touch the keyboard anymore if it is connected
* to the ports of the root hub?
*/
#ifdef USB_DEBUG
if (pci_read_config(self, PCI_LEGSUP, 2) != PCI_LEGSUP_USBPIRQDEN) {
device_printf(self, "LegSup = 0x%04x\n",
pci_read_config(self, PCI_LEGSUP, 2));
}
#endif
pci_write_config(self, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN, 2);
err = uhci_init(sc);
if (!err) {
err = device_probe_and_attach(sc->sc_bus.bdev);
}
if (err) {
device_printf(self, "USB init failed\n");
goto error;
}
return (0);
error:
uhci_pci_detach(self);
return (ENXIO);
}
void
uhci_cardbus_attach(struct device *parent, struct device *self, void *aux)
{
struct uhci_cardbus_softc *sc = (struct uhci_cardbus_softc *)self;
struct cardbus_attach_args *ca = aux;
cardbus_devfunc_t ct = ca->ca_ct;
cardbus_chipset_tag_t cc = ct->ct_cc;
cardbus_function_tag_t cf = ct->ct_cf;
cardbusreg_t csr;
char devinfo[256];
usbd_status r;
const char *vendor;
const char *devname = sc->sc.sc_bus.bdev.dv_xname;
cardbus_devinfo(ca->ca_id, ca->ca_class, 0, devinfo, sizeof(devinfo));
printf(" %s", devinfo);
/* Map I/O registers */
if (Cardbus_mapreg_map(ct, PCI_CBIO, CARDBUS_MAPREG_TYPE_IO, 0,
&sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) {
printf("%s: can't map io space\n", devname);
return;
}
/* Disable interrupts, so we don't get any spurious ones. */
bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0);
sc->sc_cc = cc;
sc->sc_cf = cf;
sc->sc_ct = ct;
sc->sc.sc_bus.dmatag = ca->ca_dmat;
(ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_IO_ENABLE);
(ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
/* Enable the device. */
csr = cardbus_conf_read(cc, cf, ca->ca_tag,
CARDBUS_COMMAND_STATUS_REG);
cardbus_conf_write(cc, cf, ca->ca_tag, CARDBUS_COMMAND_STATUS_REG,
csr | CARDBUS_COMMAND_MASTER_ENABLE
| CARDBUS_COMMAND_IO_ENABLE);
sc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline,
IPL_USB, uhci_intr, sc, devname);
if (sc->sc_ih == NULL) {
printf("%s: couldn't establish interrupt\n", devname);
return;
}
printf(": irq %d\n", ca->ca_intrline);
/* Set LEGSUP register to its default value. */
cardbus_conf_write(cc, cf, ca->ca_tag, PCI_LEGSUP,
PCI_LEGSUP_USBPIRQDEN);
switch(cardbus_conf_read(cc, cf, ca->ca_tag, PCI_USBREV) & PCI_USBREV_MASK) {
case PCI_USBREV_PRE_1_0:
sc->sc.sc_bus.usbrev = USBREV_PRE_1_0;
break;
case PCI_USBREV_1_0:
sc->sc.sc_bus.usbrev = USBREV_1_0;
break;
case PCI_USBREV_1_1:
sc->sc.sc_bus.usbrev = USBREV_1_1;
break;
default:
sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
break;
}
uhci_run(&sc->sc, 0); /* stop the controller */
/* disable interrupts */
bus_space_barrier(sc->sc.iot, sc->sc.ioh, 0, sc->sc.sc_size,
BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0);
/* Figure out vendor for root hub descriptor. */
vendor = cardbus_findvendor(ca->ca_id);
sc->sc.sc_id_vendor = CARDBUS_VENDOR(ca->ca_id);
if (vendor)
strlcpy(sc->sc.sc_vendor, vendor, sizeof (sc->sc.sc_vendor));
else
snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor),
"vendor 0x%04x", CARDBUS_VENDOR(ca->ca_id));
r = uhci_init(&sc->sc);
if (r != USBD_NORMAL_COMPLETION) {
printf("%s: init failed, error=%d\n", devname, r);
bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
return;
}
/* Attach usb device. */
sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus,
usbctlprint);
}
static int
uhci_pci_attach(device_t self)
{
uhci_softc_t *sc = device_get_softc(self);
int rid;
int err;
pci_enable_busmaster(self);
rid = PCI_UHCI_BASE_REG;
sc->io_res = bus_alloc_resource(self, SYS_RES_IOPORT, &rid,
0, ~0, 1, RF_ACTIVE);
if (!sc->io_res) {
device_printf(self, "Could not map ports\n");
return ENXIO;
}
sc->iot = rman_get_bustag(sc->io_res);
sc->ioh = rman_get_bushandle(sc->io_res);
/* disable interrupts */
bus_space_write_2(sc->iot, sc->ioh, UHCI_INTR, 0);
rid = 0;
sc->irq_res = bus_alloc_resource(self, SYS_RES_IRQ, &rid,
0, ~0, 1,
RF_SHAREABLE | RF_ACTIVE);
if (sc->irq_res == NULL) {
device_printf(self, "Could not allocate irq\n");
uhci_pci_detach(self);
return ENXIO;
}
sc->sc_bus.bdev = device_add_child(self, "usb", -1);
if (!sc->sc_bus.bdev) {
device_printf(self, "Could not add USB device\n");
uhci_pci_detach(self);
return ENOMEM;
}
device_set_ivars(sc->sc_bus.bdev, sc);
/* uhci_pci_match must never return NULL if uhci_pci_probe succeeded */
device_set_desc(sc->sc_bus.bdev, uhci_pci_match(self));
switch (pci_get_vendor(self)) {
case PCI_UHCI_VENDORID_INTEL:
sprintf(sc->sc_vendor, "Intel");
break;
case PCI_UHCI_VENDORID_VIA:
sprintf(sc->sc_vendor, "VIA");
break;
default:
if (bootverbose)
device_printf(self, "(New UHCI DeviceId=0x%08x)\n",
pci_get_devid(self));
sprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
}
switch (pci_read_config(self, PCI_USBREV, 1) & PCI_USBREV_MASK) {
case PCI_USBREV_PRE_1_0:
sc->sc_bus.usbrev = USBREV_PRE_1_0;
break;
case PCI_USBREV_1_0:
sc->sc_bus.usbrev = USBREV_1_0;
break;
default:
sc->sc_bus.usbrev = USBREV_UNKNOWN;
break;
}
err = bus_setup_intr(self, sc->irq_res, INTR_TYPE_BIO,
(driver_intr_t *) uhci_intr, sc, &sc->ih);
if (err) {
device_printf(self, "Could not setup irq, %d\n", err);
sc->ih = NULL;
uhci_pci_detach(self);
return ENXIO;
}
/*
* Set the PIRQD enable bit and switch off all the others. We don't
* want legacy support to interfere with us XXX Does this also mean
* that the BIOS won't touch the keyboard anymore if it is connected
* to the ports of the root hub?
*/
#ifdef USB_DEBUG
if (pci_read_config(self, PCI_LEGSUP, 2) != PCI_LEGSUP_USBPIRQDEN)
device_printf(self, "LegSup = 0x%04x\n",
pci_read_config(self, PCI_LEGSUP, 2));
#endif
pci_write_config(self, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN, 2);
err = uhci_init(sc);
if (!err)
err = device_probe_and_attach(sc->sc_bus.bdev);
if (err) {
device_printf(self, "USB init failed\n");
uhci_pci_detach(self);
return EIO;
}
return 0; /* success */
}
