static uint32_t rtc_ioport_read(RTCState *s, uint32_t addr)
{
int ret;
struct domain *d = vrtc_domain(s);
if ( (addr & 1) == 0 )
return 0xff;
spin_lock(&s->lock);
switch ( s->hw.cmos_index )
{
case RTC_SECONDS:
case RTC_MINUTES:
case RTC_HOURS:
case RTC_DAY_OF_WEEK:
case RTC_DAY_OF_MONTH:
case RTC_MONTH:
case RTC_YEAR:
/* if not in set mode, adjust cmos before reading*/
if (!(s->hw.cmos_data[RTC_REG_B] & RTC_SET))
{
s->current_tm = gmtime(get_localtime(d));
rtc_copy_date(s);
}
ret = s->hw.cmos_data[s->hw.cmos_index];
break;
case RTC_REG_A:
ret = s->hw.cmos_data[s->hw.cmos_index];
if ((s->use_timer == 0) && update_in_progress(s))
ret |= RTC_UIP;
break;
case RTC_REG_C:
check_for_pf_ticks(s);
ret = s->hw.cmos_data[s->hw.cmos_index];
s->hw.cmos_data[RTC_REG_C] = 0x00;
if ( ret & RTC_IRQF )
hvm_isa_irq_deassert(d, RTC_IRQ);
check_update_timer(s);
alarm_timer_update(s);
s->pt_dead_ticks = 0;
break;
default:
ret = s->hw.cmos_data[s->hw.cmos_index];
break;
}
spin_unlock(&s->lock);
return ret;
}
cmos::Time cmos::Time::hw_update() {
// We're supposed to check this before every read
while (update_in_progress());
f.second = get(r_sec);
f.minute = get(r_min);
f.hour = get(r_hrs);
f.day_of_week = get(r_dow);
f.day_of_month = get(r_day);
f.month = get(r_month);
f.year = get(r_year);
f.century = get(r_cent);
return *this;
}
static uint64_t cmos_ioport_read(void *opaque, hwaddr addr,
unsigned size)
{
RTCState *s = opaque;
int ret;
if ((addr & 1) == 0) {
return 0xff;
} else {
switch(s->cmos_index) {
case RTC_IBM_PS2_CENTURY_BYTE:
s->cmos_index = RTC_CENTURY;
/* fall through */
case RTC_CENTURY:
case RTC_SECONDS:
case RTC_MINUTES:
case RTC_HOURS:
case RTC_DAY_OF_WEEK:
case RTC_DAY_OF_MONTH:
case RTC_MONTH:
case RTC_YEAR:
/* if not in set mode, calibrate cmos before
* reading*/
if (rtc_running(s)) {
rtc_update_time(s);
}
ret = s->cmos_data[s->cmos_index];
break;
case RTC_REG_A:
if (update_in_progress(s)) {
s->cmos_data[s->cmos_index] |= REG_A_UIP;
} else {
s->cmos_data[s->cmos_index] &= ~REG_A_UIP;
}
ret = s->cmos_data[s->cmos_index];
break;
case RTC_REG_C:
ret = s->cmos_data[s->cmos_index];
qemu_irq_lower(s->irq);
s->cmos_data[RTC_REG_C] = 0x00;
if (ret & (REG_C_UF | REG_C_AF)) {
check_update_timer(s);
}
#ifdef TARGET_I386
if(s->irq_coalesced &&
(s->cmos_data[RTC_REG_B] & REG_B_PIE) &&
s->irq_reinject_on_ack_count < RTC_REINJECT_ON_ACK_COUNT) {
s->irq_reinject_on_ack_count++;
s->cmos_data[RTC_REG_C] |= REG_C_IRQF | REG_C_PF;
apic_reset_irq_delivered();
DPRINTF_C("cmos: injecting on ack\n");
qemu_irq_raise(s->irq);
if (apic_get_irq_delivered()) {
s->irq_coalesced--;
DPRINTF_C("cmos: coalesced irqs decreased to %d\n",
s->irq_coalesced);
}
}
#endif
break;
default:
ret = s->cmos_data[s->cmos_index];
break;
}
CMOS_DPRINTF("cmos: read index=0x%02x val=0x%02x\n",
s->cmos_index, ret);
return ret;
}
}
